[PATCH 03/12] drm/i915/skl_scaler: Introduce helper for chroma downscale factor

[Ankit Nautiyal]

For 444 to 420 output format conversion, scaler uses 2x downscaling in
each direction. Introduce skl_scaler_chroma_downscale_factor() to
encapsulate the chroma subsampling adjustment used in scaler/dsc
pre-fill latency calculations.

Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c    | 5 +++++
 drivers/gpu/drm/i915/display/skl_scaler.h    | 3 +++
 drivers/gpu/drm/i915/display/skl_watermark.c | 7 +++----
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
b/drivers/gpu/drm/i915/display/skl_scaler.c
index c6cccf170ff1..af2cbd54c32e 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -968,3 +968,8 @@ void adl_scaler_ecc_unmask(const struct intel_crtc_state 
*crtc_state)
                          1);
        intel_de_write(display, XELPD_DISPLAY_ERR_FATAL_MASK, 0);
 }
+
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state 
*crtc_state)
+{
+       return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 
1;
+}
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h 
b/drivers/gpu/drm/i915/display/skl_scaler.h
index 12a19016c5f6..257330d4c329 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -45,4 +45,7 @@ skl_scaler_mode_valid(struct intel_display *display,
 void adl_scaler_ecc_mask(const struct intel_crtc_state *crtc_state);
 
 void adl_scaler_ecc_unmask(const struct intel_crtc_state *crtc_state);
+
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state 
*crtc_state);
+
 #endif
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c 
b/drivers/gpu/drm/i915/display/skl_watermark.c
index e3c45a998e37..9e892767fafc 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -30,6 +30,7 @@
 #include "intel_plane.h"
 #include "intel_wm.h"
 #include "skl_universal_plane_regs.h"
+#include "skl_scaler.h"
 #include "skl_watermark.h"
 #include "skl_watermark_regs.h"
 
@@ -2182,8 +2183,7 @@ dsc_prefill_latency(const struct intel_crtc_state 
*crtc_state, int linetime)
        const struct intel_crtc_scaler_state *scaler_state =
                                        &crtc_state->scaler_state;
        int num_scaler_users = hweight32(scaler_state->scaler_users);
-       int chroma_downscaling_factor =
-               crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 
1;
+       int chroma_downscaling_factor = 
skl_scaler_chroma_downscale_factor(crtc_state);
        u32 dsc_prefill_latency = 0;
 
        if (!crtc_state->dsc.compression_enable ||
@@ -2223,8 +2223,7 @@ scaler_prefill_latency(const struct intel_crtc_state 
*crtc_state, int linetime)
        if (num_scaler_users > 1) {
                u64 hscale_k = max(1000, 
mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
                u64 vscale_k = max(1000, 
mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
-               int chroma_downscaling_factor =
-                       crtc_state->output_format == 
INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+               int chroma_downscaling_factor = 
skl_scaler_chroma_downscale_factor(crtc_state);
                int latency;
 
                latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k *
-- 
2.45.2