There is no reason in debugfs why PSR has been disabled. Add
no_psr_reason field into struct intel_psr. Write the reason,
e.g. PSR setup timing not met, into proper PSR debugfs file.
Clean it when PSR is activated.
Refactor intel_psr_post_plane_update by using no_psr_reason
instead of boolean keep_disabled.
Signed-off-by: Michał Grzelak <michal.grze...@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 ++
drivers/gpu/drm/i915/display/intel_psr.c | 31 ++++++++++---------
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index fd9d2527889b..0f8332ce1aa0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1687,6 +1687,8 @@ struct intel_psr {
bool pkg_c_latency_used;
u8 active_non_psr_pipes;
+
+ const char *no_psr_reason;
};
struct intel_dp {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index eec4f7dc2d66..4143dfc0c27c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1579,6 +1579,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp,
if (entry_setup_frames >= 0) {
intel_dp->psr.entry_setup_frames = entry_setup_frames;
} else {
+ intel_dp->psr.no_psr_reason = "PSR setup timing not met";
drm_dbg_kms(display->drm,
"PSR condition failed: PSR setup timing not met\n");
return false;
@@ -1810,6 +1811,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
hsw_activate_psr1(intel_dp);
intel_dp->psr.active = true;
+ intel_dp->psr.no_psr_reason = NULL;
}
/*
@@ -2962,28 +2964,29 @@ void intel_psr_post_plane_update(struct
intel_atomic_state *state,
crtc_state->uapi.encoder_mask) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_psr *psr = &intel_dp->psr;
- bool keep_disabled = false;
mutex_lock(&psr->lock);
drm_WARN_ON(display->drm,
psr->enabled && !crtc_state->active_planes);
- keep_disabled |= psr->sink_not_reliable;
- keep_disabled |= !crtc_state->active_planes;
+ if (psr->sink_not_reliable)
+ psr->no_psr_reason = "Sink not reliable";
+ if (!crtc_state->active_planes)
+ psr->no_psr_reason = "All planes inactive";
/* Display WA #1136: skl, bxt */
- keep_disabled |= DISPLAY_VER(display) < 11 &&
- crtc_state->wm_level_disabled;
+ if (DISPLAY_VER(display) < 11 && crtc_state->wm_level_disabled)
+ psr->no_psr_reason = "Workaround for skl, bxt";
- if (!psr->enabled && !keep_disabled)
+ if (!psr->enabled && !psr->no_psr_reason)
intel_psr_enable_locked(intel_dp, crtc_state);
else if (psr->enabled && !crtc_state->wm_level_disabled)
/* Wa_14015648006 */
wm_optimization_wa(intel_dp, crtc_state);
/* Force a PSR exit when enabling CRC to avoid CRC timeouts */
- if (crtc_state->crc_enabled && psr->enabled)
+ if (psr->enabled && crtc_state->crc_enabled)
intel_psr_force_update(intel_dp);
/*
@@ -3953,12 +3956,7 @@ static void intel_psr_print_mode(struct intel_dp
*intel_dp,
struct seq_file *m)
{
struct intel_psr *psr = &intel_dp->psr;
- const char *status, *mode, *region_et;
-
- if (psr->enabled)
- status = " enabled";
- else
- status = "disabled";
+ const char *mode, *region_et;
if (psr->panel_replay_enabled && psr->sel_update_enabled)
mode = "Panel Replay Selective Update";
@@ -3976,7 +3974,12 @@ static void intel_psr_print_mode(struct intel_dp
*intel_dp,
else
region_et = "";
- seq_printf(m, "PSR mode: %s%s%s\n", mode, status, region_et);
+ if (psr->enabled) {
+ seq_puts(m, "PSR enabled\n");
+ seq_printf(m, "PSR mode: %s%s\n", mode, region_et);
+ } else {
+ seq_printf(m, "PSR disabled: %s\n", psr->no_psr_reason);
+ }
}
static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
--
2.45.2
