[PATCH] drm/i915/dsi: Fix overflow issue in pclk parsing

[Jouni Högander]

Parsed divider p will overflow and is considered being valid divider in
case pll_ctl == 0.

Fix this by using do while.

Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c 
b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index b52463fdec47..f56985c3da54 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -142,10 +142,10 @@ static int vlv_dsi_pclk(struct intel_encoder *encoder,
        pll_div &= DSI_PLL_M1_DIV_MASK;
        pll_div = pll_div >> DSI_PLL_M1_DIV_SHIFT;
 
-       while (pll_ctl) {
+       do {
                pll_ctl = pll_ctl >> 1;
                p++;
-       }
+       } while (pll_ctl);
        p--;
 
        if (!p) {
-- 
2.43.0