On Mon, Apr 07, 2014 at 05:01:46PM -0300, Rodrigo Vivi wrote:
> From: Deepak S <deepa...@intel.com>
> 
> We need do forcewake before Disabling RC6, This is what the BIOS
> expects while going into suspend.
> 
> v2: updated commit message. (Daniel)
> 
> Signed-off-by: Deepak S <deepa...@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@gmail.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 04af065..ad2ff99 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3198,8 +3198,14 @@ static void valleyview_disable_rps(struct drm_device 
> *dev)
>  {
>       struct drm_i915_private *dev_priv = dev->dev_private;
>  
> +     /* we're doing forcewake before Disabling RC6,
> +      * This what the BIOS expects when going into suspend */
> +     gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
> +
>       I915_WRITE(GEN6_RC_CONTROL, 0);
>  
> +     gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
> +
>       gen6_disable_rps_interrupts(dev);
>  }
>  

Isn't the forcewake done as part of I915_WRITE sufficient?

-- 
Ben Widawsky, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to