> -----Original Message-----
> From: Nikula, Jani <jani.nik...@intel.com>
> Sent: Thursday, June 26, 2025 11:13 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nik...@intel.com>; Kandpal, Suraj
> <suraj.kand...@intel.com>
> Subject: [PATCH 5/8] drm/i915/hdcp: use intel_de_wait_for_set() instead of
> wait_for()
> 
> Prefer the register read specific wait function over i915 wait_for().
> 
> Note that there's a slight functional change: both HDCP_STATUS_R0_READY
> and HDCP_STATUS_ENC need to be set instead of just one or the other. This is
> likely the intention, though, as this was fixed for HDMI in commit
> 3ffaf56e912e ("drm/i915: HDCP: fix Ri prime check done during link check").

Actually the  bspec (49289) says 
Poll Status register for R0 Ready Status or Link Encrypting Status to be 1b.
-       Link Encrypting Status may be set here in the rare case where the R0 
for this authentication is the same as the previous Ri.

Not sure why the previous fix was given a OK without a HSD being dropped or not 
even as much as a change in bspec (Shrug).
IMHO a HSD should have been raised if the register was getting set and there 
was actually a mismatch
Also I really don't know if a analyzer was used to get that fix in.

Regards,
Suraj Kandpal

> 
> Cc: Suraj Kandpal <suraj.kand...@intel.com>
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 619ccfc33000..c480a75b5fb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -903,8 +903,9 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>                      HDCP_CONF_AUTH_AND_ENC);
> 
>       /* Wait for R0 ready */
> -     if (wait_for(intel_de_read(display, HDCP_STATUS(display,
> cpu_transcoder, port)) &
> -                  (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
> +     ret = intel_de_wait_for_set(display, HDCP_STATUS(display,
> cpu_transcoder, port),
> +                                 HDCP_STATUS_R0_READY |
> HDCP_STATUS_ENC, 1);
> +     if (ret) {
>               drm_err(display->drm, "Timed out waiting for R0 ready\n");
>               return -ETIMEDOUT;
>       }
> @@ -936,8 +937,9 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
>                              ri.reg);
> 
>               /* Wait for Ri prime match */
> -             if (!wait_for(intel_de_read(display, HDCP_STATUS(display,
> cpu_transcoder, port)) &
> -                           (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC),
> 1))
> +             ret = intel_de_wait_for_set(display, HDCP_STATUS(display,
> cpu_transcoder, port),
> +                                         HDCP_STATUS_RI_MATCH |
> HDCP_STATUS_ENC, 1);
> +             if (!ret)
>                       break;
>       }
> 
> --
> 2.39.5

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