From: Ville Syrjälä <ville.syrj...@linux.intel.com>
AFAIK PKG_C_LATENCY.added_wake_time only matters for flip queue.
As long as we're not using that there's no point in adding any
extra wake time.
Reviewed-by: Uma Shankar <uma.shan...@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
b/drivers/gpu/drm/i915/display/skl_watermark.c
index 85327cd627dd..a71605e3a535 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -33,12 +33,6 @@
#include "skl_watermark.h"
#include "skl_watermark_regs.h"
-/*It is expected that DSB can do posted writes to every register in
- * the pipe and planes within 100us. For flip queue use case, the
- * recommended DSB execution time is 100us + one SAGV block time.
- */
-#define DSB_EXE_TIME 100
-
static void skl_sagv_disable(struct intel_display *display);
/* Stores plane specific WM parameters */
@@ -2945,9 +2939,6 @@ intel_program_dpkgc_latency(struct intel_atomic_state
*state)
}
if (fixed_refresh_rate) {
- added_wake_time = DSB_EXE_TIME +
- display->sagv.block_time_us;
-
latency = skl_watermark_max_latency(display, 1);
/* Wa_22020432604 */
--
2.49.0
