On Thu, Apr 03, 2014 at 08:02:42PM +0300, Imre Deak wrote: > This typo may lead to missed RPS interrupts and as a result a too > low or too high frequency for the current workload. The interrupt mask > will be set properly at a subsequent GPU idle event, but can get > corrupted again at the next RPS up/down event. > > Signed-off-by: Imre Deak <imre.d...@intel.com>
Embarrassing. Really odd as I thought I just cut'n'paste that line. Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
