>From PTL, LUT registers are made double buffered. This helps us
to program them in the active region without any concern of tearing.
This particulary helps in case of displays with high refresh rates
where vblank periods are shorter. Add MMIO and DSB path to program them.
Chaitanya Kumar Borah (7):
drm/i915/dsb: add intel_dsb_gosub_finish()
drm/i915/dsb: Add support for GOSUB interrupt
drm/i915: s/dsb_color_vblank/dsb_color
drm/i915/display: use GOSUB to program double buffered LUT registers
drm/i915: Program DB LUT registers before vblank
drm/i915/color: Do not pre-load LUTs with DB registers
drm/i915: Disable updating of LUT values during vblank
Ville Syrjälä (4):
drm/i915/dsb: Extract intel_dsb_ins_align()
drm/i915/dsb: Extract assert_dsb_tail_is_aligned()
drm/i915/dsb: Extract intel_dsb_{head,tail}()
drm/i915/dsb: Implement intel_dsb_gosub()
drivers/gpu/drm/i915/display/intel_atomic.c | 4 +-
drivers/gpu/drm/i915/display/intel_color.c | 73 ++++++----
drivers/gpu/drm/i915/display/intel_color.h | 2 +
drivers/gpu/drm/i915/display/intel_crtc.c | 5 +-
drivers/gpu/drm/i915/display/intel_display.c | 40 ++++--
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_dsb.c | 130 ++++++++++++++++--
drivers/gpu/drm/i915/display/intel_dsb.h | 3 +
drivers/gpu/drm/i915/display/intel_dsb_regs.h | 2 +
10 files changed, 207 insertions(+), 55 deletions(-)
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2.25.1
