Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Bspec: 68859
Reviewed-by: Matt Roper <matthew.d.ro...@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.so...@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index
629b335a00e376cba619f84344459834b70316e4..b673911d2fe31c0ccb0f27767f174bcb715edf7e
100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -405,6 +405,13 @@ static const struct intel_sa_info xe2_hpd_sa_info = {
/* Other values not used by simplified algorithm */
};
+static const struct intel_sa_info xe3lpd_sa_info = {
+ .deburst = 32,
+ .deprogbwlimit = 65, /* GB/s */
+ .displayrtids = 256,
+ .derating = 10,
+};
+
static int icl_get_bw_info(struct intel_display *display, const struct
intel_sa_info *sa)
{
struct drm_i915_private *i915 = to_i915(display->drm);
@@ -753,7 +760,9 @@ void intel_bw_init_hw(struct intel_display *display)
if (!HAS_DISPLAY(display))
return;
- if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
+ if (DISPLAY_VER(display) >= 30)
+ tgl_get_bw_info(display, &xe3lpd_sa_info);
+ else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
xe2_hpd_get_bw_info(display, &xe2_hpd_sa_info);
else if (DISPLAY_VER(display) >= 14)
tgl_get_bw_info(display, &mtl_sa_info);
--
2.48.1
