On Mon, Mar 10, 2025 at 05:46:15PM +0530, Ankit Nautiyal wrote:
> Add fixed refresh rate mode in crtc_state dump.
> VRR Timing Generator is running in fixed refresh rate mode when
> vrr.vmin = vrr.vmax = vrr.flipline.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_vrr.c | 1 -
> drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
> 3 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index 599ddce96371..f204a5830c29 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -294,8 +294,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state
> *pipe_config,
> pipe_config->hw.adjusted_mode.crtc_vdisplay,
> pipe_config->framestart_delay,
> pipe_config->msa_timing_delay);
>
> - drm_printf(&p, "vrr: %s, vmin: %d, vmax: %d, flipline: %d, pipeline
> full: %d, guardband: %d vsync start: %d, vsync end: %d\n",
> + drm_printf(&p, "vrr: %s, fixed_rr: %s, vmin: %d, vmax: %d, flipline:
> %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n",
s/fixed_rr/fixed rr/ for consistency with the other stuff.
With that
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> str_yes_no(pipe_config->vrr.enable),
> + str_yes_no(intel_vrr_is_fixed_rr(pipe_config)),
> pipe_config->vrr.vmin, pipe_config->vrr.vmax,
> pipe_config->vrr.flipline,
> pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband,
> pipe_config->vrr.vsync_start, pipe_config->vrr.vsync_end);
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 35f1463583f7..506305cbcbde 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -654,7 +654,6 @@ void intel_vrr_transcoder_disable(const struct
> intel_crtc_state *crtc_state)
> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
> }
>
> -static
> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
> {
> return crtc_state->vrr.flipline &&
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
> b/drivers/gpu/drm/i915/display/intel_vrr.h
> index c92d6dd26f6d..8086fb74126a 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -40,5 +40,6 @@ void intel_vrr_transcoder_enable(const struct
> intel_crtc_state *crtc_state);
> void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
> void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state
> *crtc_state);
> bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
> +bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_VRR_H__ */
> --
> 2.45.2
--
Ville Syrjälä
Intel
