On the regular igfx runtime pm sequence where d3cold is not possible, the proper calls to power display are required.
Align with i915. v2: Rebase only. Reviewed-by: Jonathan Cavitt <jonathan.cav...@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com> --- drivers/gpu/drm/xe/display/xe_display.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index ebe0e8c3d722..3a289d245cde 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -363,6 +363,8 @@ void xe_display_pm_shutdown(struct xe_device *xe) void xe_display_pm_runtime_suspend(struct xe_device *xe) { + struct intel_display *display = &xe->display; + if (!xe->info.probe_display) return; @@ -371,6 +373,7 @@ void xe_display_pm_runtime_suspend(struct xe_device *xe) return; } + intel_display_power_suspend(display); intel_hpd_poll_enable(xe); } @@ -471,6 +474,8 @@ void xe_display_pm_resume(struct xe_device *xe) void xe_display_pm_runtime_resume(struct xe_device *xe) { + struct intel_display *display = &xe->display; + if (!xe->info.probe_display) return; @@ -479,6 +484,7 @@ void xe_display_pm_runtime_resume(struct xe_device *xe) return; } + intel_display_power_resume(display); intel_hpd_init(xe); intel_hpd_poll_disable(xe); skl_watermark_ipc_update(xe); -- 2.48.1