On Fri, 14 Feb 2025, Imre Deak <imre.d...@intel.com> wrote: > This v2 of [1], addressing the review comments from Jani and adding Rbs. > This version contains only the first half of the patchset, leaving the > rest for a follow-up, since programming DDI_BUF_CTL via RMW contained in > the latter part needs more thought.
Good stuff, Rb's stand, and it's good to get the ready stuff merged before this starts conflicting. Thanks, Jani. > > Cc: Jani Nikula <jani.nik...@intel.com> > Cc: Mika Kahola <mika.kah...@intel.com> > > [1] https://patchwork.freedesktop.org/series/144122 > > Imre Deak (11): > drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro > drm/i915/ddi: Fix HDMI port width programming in DDI_BUF_CTL > drm/i915/ddi: Make all the PORT_WIDTH macros work the same way > drm/i915/ddi: Set missing TC DP PHY lane stagger delay in DDI_BUF_CTL > drm/i915/ddi: Simplify the port enabling via DDI_BUF_CTL > drm/i915/ddi: Simplify the port disabling via DDI_BUF_CTL > drm/i915/ddi: Simplify waiting for a port to get active/idle via > DDI_BUF_CTL > drm/i915/ddi: Move platform checks within > mtl_ddi_enable/disable_d2d_link() > drm/i915/ddi: Unify the platform specific functions disabling a port > drm/i915/ddi: Add a helper to enable a port > drm/i915/ddi: Sanitize DDI_BUF_CTL register definitions > > drivers/gpu/drm/i915/display/icl_dsi.c | 4 +- > .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 3 +- > drivers/gpu/drm/i915/display/intel_ddi.c | 256 +++++++----------- > drivers/gpu/drm/i915/i915_reg.h | 25 +- > 4 files changed, 123 insertions(+), 165 deletions(-) -- Jani Nikula, Intel
