It is not recommended to have both FBC dirty rect and PSR2
selective fetch be enabled at the same time. Mark FBC as not
possible, if PSR2 selective fetch is enabled.
v2: fix the condition to disable FBC if PSR2 enabled (Jani)
v3: use HAS_FBC_DIRTY_RECT()
v4: Update to patch description
Bspec: 68881
Signed-off-by: Vinod Govindapillai <vinod.govindapil...@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 66a5ee10a649..bd8ca6ef832a 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1434,9 +1434,14 @@ static int intel_fbc_check_plane(struct
intel_atomic_state *state,
* Display 12+ is not supporting FBC with PSR2.
* Recommendation is to keep this combination disabled
* Bspec: 50422 HSD: 14010260002
+ *
+ * In Xe3, PSR2 selective fetch and FBC dirty rect feature cannot
+ * coexist. So if PSR2 selective fetch is supported then mark that
+ * FBC is not supported.
+ * TODO: Need a logic to decide between PSR2 and FBC Dirty rect
*/
- if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update &&
- !crtc_state->has_panel_replay) {
+ if ((IS_DISPLAY_VER(display, 12, 14) || HAS_FBC_DIRTY_RECT(display)) &&
+ crtc_state->has_sel_update && !crtc_state->has_panel_replay) {
plane_state->no_fbc_reason = "PSR2 enabled";
return 0;
}
--
2.43.0
