On Wed, Jan 29, 2025 at 04:46:35PM +0200, Jani Nikula wrote:
> Semantically mst_stream_find_vcpi_slots_for_bpp() does not seem like the
> place to make decisions about lane_count and port_clock. Move them to
> the callers, and remove the limits parameter that becomes unused.
>
> This leads to slight duplication, but a) this makes further refactoring
> easier, and b) also the SST code sets link parameters in different
> places for uncompressed and compressed paths.
>
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Reviewed-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 98d7cdddfead..ea1b05224c06 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -362,7 +362,6 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp
> *intel_dp,
> static int mst_stream_find_vcpi_slots_for_bpp(struct intel_dp *intel_dp,
> struct intel_crtc_state
> *crtc_state,
> int max_bpp, int min_bpp,
> - const struct link_config_limits
> *limits,
> struct drm_connector_state
> *conn_state,
> int step, bool dsc)
> {
> @@ -373,9 +372,6 @@ static int mst_stream_find_vcpi_slots_for_bpp(struct
> intel_dp *intel_dp,
> if (IS_ERR(mst_state))
> return PTR_ERR(mst_state);
>
> - crtc_state->lane_count = limits->max_lane_count;
> - crtc_state->port_clock = limits->max_rate;
> -
> mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock,
> crtc_state->lane_count);
>
> @@ -388,6 +384,9 @@ static int mst_stream_compute_link_config(struct intel_dp
> *intel_dp,
> struct drm_connector_state
> *conn_state,
> const struct link_config_limits
> *limits)
> {
> + crtc_state->lane_count = limits->max_lane_count;
> + crtc_state->port_clock = limits->max_rate;
> +
> /*
> * FIXME: allocate the BW according to link_bpp, which in the case of
> * YUV420 is only half of the pipe bpp value.
> @@ -395,7 +394,6 @@ static int mst_stream_compute_link_config(struct intel_dp
> *intel_dp,
> return mst_stream_find_vcpi_slots_for_bpp(intel_dp, crtc_state,
>
> fxp_q4_to_int(limits->link.max_bpp_x16),
>
> fxp_q4_to_int(limits->link.min_bpp_x16),
> - limits,
> conn_state, 2 * 3, false);
> }
>
> @@ -453,8 +451,11 @@ static int mst_stream_dsc_compute_link_config(struct
> intel_dp *intel_dp,
> min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display,
> min_compressed_bpp,
>
> crtc_state->pipe_bpp);
>
> + crtc_state->lane_count = limits->max_lane_count;
> + crtc_state->port_clock = limits->max_rate;
> +
> return mst_stream_find_vcpi_slots_for_bpp(intel_dp, crtc_state,
> max_compressed_bpp,
> - min_compressed_bpp, limits,
> + min_compressed_bpp,
> conn_state, 1, true);
> }
>
> --
> 2.39.5
>
