From: Ville Syrjälä <ville.syrj...@linux.intel.com>
Try to keep all the low level skl+ universal plane register
details inside skl_universal_plane.c instead of having them
sprinkled all over the place.
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 30 ++++-------------
.../drm/i915/display/skl_universal_plane.c | 32 +++++++++++++++++++
.../drm/i915/display/skl_universal_plane.h | 3 ++
3 files changed, 41 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3e784fbd4474..36611b290dff 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -123,7 +123,6 @@
#include "intel_wm.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
-#include "skl_universal_plane_regs.h"
#include "skl_watermark.h"
#include "vlv_dpio_phy_regs.h"
#include "vlv_dsi.h"
@@ -4425,33 +4424,16 @@ static void link_nv12_planes(struct intel_crtc_state
*crtc_state,
y_plane->base.name, uv_plane->base.name);
/* Copy parameters to Y plane */
- y_plane_state->ctl = uv_plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
- y_plane_state->color_ctl = uv_plane_state->color_ctl;
- y_plane_state->view = uv_plane_state->view;
- y_plane_state->decrypt = uv_plane_state->decrypt;
-
intel_plane_copy_hw_state(y_plane_state, uv_plane_state);
y_plane_state->uapi.src = uv_plane_state->uapi.src;
y_plane_state->uapi.dst = uv_plane_state->uapi.dst;
- if (icl_is_hdr_plane(dev_priv, uv_plane->id)) {
- switch (y_plane->id) {
- case PLANE_7:
- uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL;
- break;
- case PLANE_6:
- uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL;
- break;
- case PLANE_5:
- uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL;
- break;
- case PLANE_4:
- uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL;
- break;
- default:
- MISSING_CASE(y_plane->id);
- }
- }
+ y_plane_state->ctl = uv_plane_state->ctl;
+ y_plane_state->color_ctl = uv_plane_state->color_ctl;
+ y_plane_state->view = uv_plane_state->view;
+ y_plane_state->decrypt = uv_plane_state->decrypt;
+
+ icl_link_nv12_planes(uv_plane_state, y_plane_state);
}
static void unlink_nv12_plane(struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index d5e5b76c5b38..4c19fce4db0e 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2316,6 +2316,38 @@ static int skl_plane_check(struct intel_crtc_state
*crtc_state,
return 0;
}
+void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state,
+ struct intel_plane_state *y_plane_state)
+{
+ struct intel_plane *uv_plane =
to_intel_plane(uv_plane_state->uapi.plane);
+ struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane);
+ struct drm_i915_private *i915 = to_i915(uv_plane->base.dev);
+
+ drm_WARN_ON(&i915->drm, icl_is_nv12_y_plane(i915, uv_plane->id));
+ drm_WARN_ON(&i915->drm, !icl_is_nv12_y_plane(i915, y_plane->id));
+
+ y_plane_state->ctl |= PLANE_CTL_YUV420_Y_PLANE;
+
+ if (icl_is_hdr_plane(i915, uv_plane->id)) {
+ switch (y_plane->id) {
+ case PLANE_7:
+ uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL;
+ break;
+ case PLANE_6:
+ uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL;
+ break;
+ case PLANE_5:
+ uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL;
+ break;
+ case PLANE_4:
+ uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL;
+ break;
+ default:
+ MISSING_CASE(y_plane->id);
+ }
+ }
+}
+
static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)
{
return pipe - PIPE_A + INTEL_FBC_A;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h
b/drivers/gpu/drm/i915/display/skl_universal_plane.h
index 18b41d13f0bd..9161bf64e8a3 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h
@@ -32,6 +32,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool
alpha);
int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
int *x, int *y, u32 *offset);
+void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state,
+ struct intel_plane_state *y_plane_state);
+
bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv,
enum plane_id plane_id);
u8 icl_hdr_plane_mask(void);
--
2.45.3
