Currently VRR timing generator is used only when VRR is enabled by
userspace. From MTL+, gradually move away from older timing
generator and use VRR timing generator for fixed refresh rate also.
In such a case, Flipline Vmin and Vmax all are set to the Vtotal of the
mode, which effectively makes the VRR timing generator work in
fixed refresh rate mode.
The MSA Vtotal is derived from Vmax register.
Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index b6d45f4ccf53..d357733f24d4 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -235,6 +235,14 @@ void intel_vrr_prepare_fixed_timings(struct
intel_crtc_state *crtc_state, int vm
crtc_state->vrr.flipline = crtc_state->vrr.vmax;
}
+static
+void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state,
int vmin)
+{
+ intel_vrr_prepare_fixed_timings(crtc_state, vmin);
+ crtc_state->vrr.mode = INTEL_VRRTG_MODE_FIXED_RR;
+ crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+}
+
static
void intel_vrr_prepare_vrr_timings(struct intel_crtc_state *crtc_state, int
vmin, int vmax)
{
@@ -352,13 +360,12 @@ intel_vrr_compute_config(struct intel_crtc_state
*crtc_state,
vmin = intel_vrr_compute_vmin(crtc_state);
- if (vmin >= vmax)
- return;
-
- if (crtc_state->uapi.vrr_enabled)
+ if (crtc_state->uapi.vrr_enabled && vmin < vmax)
intel_vrr_compute_vrr_timings(crtc_state, vmin, vmax);
else if (is_cmrr_frac_required(crtc_state) && is_edp)
intel_vrr_compute_cmrr_timings(crtc_state);
+ else if (intel_vrr_always_use_vrr_tg(display))
+ intel_vrr_compute_fixed_rr_timings(crtc_state, vmin);
else
intel_vrr_prepare_fixed_timings(crtc_state, vmin);
--
2.45.2
