On Mon, Jan 20, 2025 at 01:45:12PM +0530, Nitin Gote wrote:
> Fix all typos in files under drm/i915/gem reported by codespell tool.
>
> v2: Codespell won't catch it, but it should be
> "user defined" and not "use defined". <Krzysztof Niemiec>
>
> Signed-off-by: Nitin Gote <nitin.r.g...@intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +++---
> drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 6 +++---
> drivers/gpu/drm/i915/gem/i915_gem_domain.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
> drivers/gpu/drm/i915/gem/i915_gem_region.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 4 ++--
> drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +-
Joonas, Tvrtko, ack on taking this and the other gt related patch from this
series both in drm-intel-next?
> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 2 +-
> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 2 +-
> 11 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index c0543c35cd6a..ab1af978911b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -238,7 +238,7 @@ static int proto_context_set_persistence(struct
> drm_i915_private *i915,
> *
> * However, if we cannot reset an engine by itself, we cannot
> * cleanup a hanging persistent context without causing
> - * colateral damage, and we should not pretend we can by
> + * collateral damage, and we should not pretend we can by
> * exposing the interface.
> */
> if (!intel_has_reset_engine(to_gt(i915)))
> @@ -1589,7 +1589,7 @@ static int __context_set_persistence(struct
> i915_gem_context *ctx, bool state)
> *
> * However, if we cannot reset an engine by itself, we cannot
> * cleanup a hanging persistent context without causing
> - * colateral damage, and we should not pretend we can by
> + * collateral damage, and we should not pretend we can by
> * exposing the interface.
> */
> if (!intel_has_reset_engine(to_gt(ctx->i915)))
> @@ -2328,7 +2328,7 @@ finalize_create_context_locked(struct
> drm_i915_file_private *file_priv,
>
> /*
> * One for the xarray and one for the caller. We need to grab
> - * the reference *prior* to making the ctx visble to userspace
> + * the reference *prior* to making the ctx visible to userspace
> * in gem_context_register(), as at any point after that
> * userspace can try to race us with another thread destroying
> * the context under our feet.
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> index b6d97da63d1f..67ac2586a0f3 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
> @@ -245,9 +245,9 @@ struct i915_gem_context {
> * Execbuf uses the I915_EXEC_RING_MASK as an index into this
> * array to select which HW context + engine to execute on. For
> * the default array, the user_ring_map[] is used to translate
> - * the legacy uABI onto the approprate index (e.g. both
> + * the legacy uABI onto the appropriate index (e.g. both
> * I915_EXEC_DEFAULT and I915_EXEC_RENDER select the same
> - * context, and I915_EXEC_BSD is weird). For a use defined
> + * context, and I915_EXEC_BSD is weird). For a user defined
> * array, execbuf uses I915_EXEC_RING_MASK as a plain index.
> *
> * User defined by I915_CONTEXT_PARAM_ENGINE (when the
> @@ -276,7 +276,7 @@ struct i915_gem_context {
> * @vm: unique address space (GTT)
> *
> * In full-ppgtt mode, each context has its own address space ensuring
> - * complete seperation of one client from all others.
> + * complete separation of one client from all others.
> *
> * In other modes, this is a NULL pointer with the expectation that
> * the caller uses the shared global GTT.
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 3770828f2eaf..ee55caca67a1 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -276,7 +276,7 @@ int i915_gem_object_set_cache_level(struct
> drm_i915_gem_object *obj,
> * For objects created by userspace through GEM_CREATE with pat_index
> * set by set_pat extension, simply return 0 here without touching
> * the cache setting, because such objects should have an immutable
> - * cache setting by desgin and always managed by userspace.
> + * cache setting by design and always managed by userspace.
> */
> if (i915_gem_object_has_cache_level(obj, cache_level))
> return 0;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index f151640c1d13..c8107502190d 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -303,7 +303,7 @@ struct i915_execbuffer {
> struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch
> buffer */
>
> /**
> - * Indicate either the size of the hastable used to resolve
> + * Indicate either the size of the hashtable used to resolve
> * relocation handles, or if negative that we are using a direct
> * index into the execobj[].
> */
> @@ -2543,7 +2543,7 @@ static int eb_pin_timeline(struct i915_execbuffer *eb,
> struct intel_context *ce,
>
> /*
> * Error path, cannot use intel_context_timeline_lock as
> - * that is user interruptable and this clean up step
> + * that is user interruptible and this clean up step
> * must be done.
> */
> mutex_lock(&ce->timeline->mutex);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.c
> b/drivers/gpu/drm/i915/gem/i915_gem_region.c
> index b09b74a2448b..636768d0f57e 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_region.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_region.c
> @@ -82,7 +82,7 @@ __i915_gem_object_create_region(struct intel_memory_region
> *mem,
>
> /*
> * Anything smaller than the min_page_size can't be freely inserted into
> - * the GTT, due to alignemnt restrictions. For such special objects,
> + * the GTT, due to alignment restrictions. For such special objects,
> * make sure we force memcpy based suspend-resume. In the future we can
> * revisit this, either by allowing special mis-aligned objects in the
> * migration path, or by mapping all of LMEM upfront using cheap 1G
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> index 9117e9422844..aec41f0f098f 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
> @@ -25,7 +25,7 @@ static bool swap_available(void)
>
> static bool can_release_pages(struct drm_i915_gem_object *obj)
> {
> - /* Consider only shrinkable ojects. */
> + /* Consider only shrinkable objects. */
> if (!i915_gem_object_is_shrinkable(obj))
> return false;
>
> @@ -261,7 +261,7 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
> * i915_gem_shrink_all - Shrink buffer object caches completely
> * @i915: i915 device
> *
> - * This is a simple wraper around i915_gem_shrink() to aggressively shrink
> all
> + * This is a simple wrapper around i915_gem_shrink() to aggressively shrink
> all
> * caches completely. It also first waits for and retires all outstanding
> * requests to also be able to release backing storage for active objects.
> *
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> index d9eb84c1d2f1..5ac23ff3feff 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> @@ -39,7 +39,7 @@
> * Since neither of this applies for new tiling layouts on modern platforms
> like
> * W, Ys and Yf tiling GEM only allows object tiling to be set to X or Y
> tiled.
> * Anything else can be handled in userspace entirely without the kernel's
> - * invovlement.
> + * involvement.
> */
>
> /**
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index 10d8673641f7..1f4814968868 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -994,7 +994,7 @@ void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj)
> * If we need to place an LMEM resource which doesn't need CPU
> * access then we should try not to victimize mappable objects
> * first, since we likely end up stealing more of the mappable
> - * portion. And likewise when we try to find space for a mappble
> + * portion. And likewise when we try to find space for a
> mappable
> * object, we know not to ever victimize objects that don't
> * occupy any mappable pages.
> */
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> index 041dab543b78..2f6b33edb9c9 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> @@ -603,7 +603,7 @@ int i915_ttm_move(struct ttm_buffer_object *bo, bool
> evict,
> * sequence, where at the end we can do the move for real.
> *
> * The special case here is when the dst_mem is TTM_PL_SYSTEM,
> - * which doens't require any kind of move, so it should be safe
> + * which doesn't require any kind of move, so it should be safe
> * to skip all the below and call ttm_bo_move_null() here, where
> * the caller in __i915_ttm_get_pages() will take care of the
> * rest, since we should have a valid ttm_tt.
> diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> index 84d41e6ccf05..bd08605a1611 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> @@ -1781,7 +1781,7 @@ static int igt_tmpfs_fallback(void *arg)
>
> /*
> * Make sure that we don't burst into a ball of flames upon falling back
> - * to tmpfs, which we rely on if on the off-chance we encouter a failure
> + * to tmpfs, which we rely on if on the off-chance we encounter a
> failure
> * when setting up gemfs.
> */
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> index 99a9ade73956..804f74084bd4 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> @@ -1342,7 +1342,7 @@ static int igt_mmap_migrate(void *arg)
> }
>
> /*
> - * Allocate in the mappable portion, should be no suprises here.
> + * Allocate in the mappable portion, should be no surprises
> here.
> */
> err = __igt_mmap_migrate(mixed, ARRAY_SIZE(mixed), mr, 0);
> if (err)
> --
> 2.25.1
>
