On Thu, Feb 20, 2014 at 11:53:07AM -0800, Jesse Barnes wrote:
> On Tue, 18 Feb 2014 00:02:19 +0200
> Imre Deak <imre.d...@intel.com> wrote:
>
> > Signed-off-by: Imre Deak <imre.d...@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 12 ++++++------
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 21ccf89..68f58e5 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5213,6 +5213,12 @@ bool intel_display_power_enabled(struct
> > drm_i915_private *dev_priv,
> > return is_enabled;
> > }
> >
> > +/*
> > + * Starting with Haswell, we have a "Power Down Well" that can be turned
> > off
> > + * when not needed anymore. We have 4 registers that can request the power
> > well
> > + * to be enabled, and it will only be disabled if none of the registers is
> > + * requesting it to be enabled.
> > + */
> > static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
> > {
> > struct drm_device *dev = dev_priv->dev;
> > @@ -5556,12 +5562,6 @@ static void intel_power_domains_resume(struct
> > drm_i915_private *dev_priv)
> > mutex_unlock(&power_domains->lock);
> > }
> >
> > -/*
> > - * Starting with Haswell, we have a "Power Down Well" that can be turned
> > off
> > - * when not needed anymore. We have 4 registers that can request the power
> > well
> > - * to be enabled, and it will only be disabled if none of the registers is
> > - * requesting it to be enabled.
> > - */
> > void intel_power_domains_init_hw(struct drm_i915_private *dev_priv)
> > {
> > /* For now, we need the power well to be always enabled. */
>
> Reviewed-by: Jesse Barnes <jbar...@virtuousgeek.org>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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