Currently there is no way to disable Panel Replay without disabling
PSR. Add new debug bit to be used with i915_edp_psr_debug debugfs
interface.

v2: ensure that fastset is performed when the bit changes

Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c           | 11 +++++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index df29ec37ef28..089c53d5f3c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1690,6 +1690,7 @@ struct intel_psr {
 #define I915_PSR_DEBUG_ENABLE_SEL_FETCH                0x4
 #define I915_PSR_DEBUG_IRQ                     0x10
 #define I915_PSR_DEBUG_SU_REGION_ET_DISABLE    0x20
+#define I915_PSR_DEBUG_PANEL_REPLAY_DISABLE    0x40
 
        u32 debug;
        bool sink_support;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index a10d9383cc87..b4cd7a8b17bc 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1520,6 +1520,9 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
        if (!CAN_PANEL_REPLAY(intel_dp))
                return false;
 
+       if (intel_dp->psr.debug & I915_PSR_DEBUG_PANEL_REPLAY_DISABLE)
+               return false;
+
        if (!intel_dp_is_edp(intel_dp))
                return true;
 
@@ -2845,11 +2848,13 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64 
val)
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
        const u32 mode = val & I915_PSR_DEBUG_MODE_MASK;
-       const u32 disable_bits = val & I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
+       const u32 disable_bits = val & (I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+                                       I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);
        u32 old_mode, old_disable_bits;
        int ret;
 
        if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+                   I915_PSR_DEBUG_PANEL_REPLAY_DISABLE |
                    I915_PSR_DEBUG_MODE_MASK) ||
            mode > I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
                drm_dbg_kms(&dev_priv->drm, "Invalid debug mask %llx\n", val);
@@ -2862,7 +2867,9 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64 
val)
 
        old_mode = intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK;
        old_disable_bits = intel_dp->psr.debug &
-               I915_PSR_DEBUG_SU_REGION_ET_DISABLE;
+               (I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+                I915_PSR_DEBUG_PANEL_REPLAY_DISABLE);
+
        intel_dp->psr.debug = val;
 
        /*
-- 
2.34.1

Reply via email to