Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_STATUS register macro.

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
 drivers/gpu/drm/i915/display/intel_lvds.c          | 6 +++---
 drivers/gpu/drm/i915/display/intel_pps.c           | 4 ++--
 drivers/gpu/drm/i915/display/intel_pps_regs.h      | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index a860d88a65da..34b6d843bc9e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1207,7 +1207,7 @@ static void assert_can_disable_lcpll(struct 
drm_i915_private *dev_priv)
                        intel_de_read(dev_priv, WRPLL_CTL(1)) & 
WRPLL_PLL_ENABLE,
                        "WRPLL2 enabled\n");
        I915_STATE_WARN(dev_priv,
-                       intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
+                       intel_de_read(dev_priv, PP_STATUS(dev_priv, 0)) & PP_ON,
                        "Panel power on\n");
        I915_STATE_WARN(dev_priv,
                        intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & 
BLM_PWM_ENABLE,
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c 
b/drivers/gpu/drm/i915/display/intel_lvds.c
index 8b8959073466..eec0dab3c3b2 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -324,7 +324,7 @@ static void intel_enable_lvds(struct intel_atomic_state 
*state,
        intel_de_rmw(dev_priv, PP_CONTROL(0), 0, PANEL_POWER_ON);
        intel_de_posting_read(dev_priv, lvds_encoder->reg);
 
-       if (intel_de_wait_for_set(dev_priv, PP_STATUS(0), PP_ON, 5000))
+       if (intel_de_wait_for_set(dev_priv, PP_STATUS(dev_priv, 0), PP_ON, 
5000))
                drm_err(&dev_priv->drm,
                        "timed out waiting for panel to power on\n");
 
@@ -340,7 +340,7 @@ static void intel_disable_lvds(struct intel_atomic_state 
*state,
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
        intel_de_rmw(dev_priv, PP_CONTROL(0), PANEL_POWER_ON, 0);
-       if (intel_de_wait_for_clear(dev_priv, PP_STATUS(0), PP_ON, 1000))
+       if (intel_de_wait_for_clear(dev_priv, PP_STATUS(dev_priv, 0), PP_ON, 
1000))
                drm_err(&dev_priv->drm,
                        "timed out waiting for panel to power off\n");
 
@@ -379,7 +379,7 @@ static void intel_lvds_shutdown(struct intel_encoder 
*encoder)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
-       if (intel_de_wait_for_clear(dev_priv, PP_STATUS(0), 
PP_CYCLE_DELAY_ACTIVE, 5000))
+       if (intel_de_wait_for_clear(dev_priv, PP_STATUS(dev_priv, 0), 
PP_CYCLE_DELAY_ACTIVE, 5000))
                drm_err(&dev_priv->drm,
                        "timed out waiting for panel power cycle delay\n");
 }
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
b/drivers/gpu/drm/i915/display/intel_pps.c
index 0ccbf9a85914..9aa08b525810 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -272,7 +272,7 @@ typedef bool (*pps_check)(struct drm_i915_private 
*dev_priv, int pps_idx);
 
 static bool pps_has_pp_on(struct drm_i915_private *dev_priv, int pps_idx)
 {
-       return intel_de_read(dev_priv, PP_STATUS(pps_idx)) & PP_ON;
+       return intel_de_read(dev_priv, PP_STATUS(dev_priv, pps_idx)) & PP_ON;
 }
 
 static bool pps_has_vdd_on(struct drm_i915_private *dev_priv, int pps_idx)
@@ -492,7 +492,7 @@ static void intel_pps_get_registers(struct intel_dp 
*intel_dp,
                pps_idx = intel_dp->pps.pps_idx;
 
        regs->pp_ctrl = PP_CONTROL(pps_idx);
-       regs->pp_stat = PP_STATUS(pps_idx);
+       regs->pp_stat = PP_STATUS(dev_priv, pps_idx);
        regs->pp_on = PP_ON_DELAYS(pps_idx);
        regs->pp_off = PP_OFF_DELAYS(pps_idx);
 
diff --git a/drivers/gpu/drm/i915/display/intel_pps_regs.h 
b/drivers/gpu/drm/i915/display/intel_pps_regs.h
index bdcdf6ae2747..06bdf766b749 100644
--- a/drivers/gpu/drm/i915/display/intel_pps_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_pps_regs.h
@@ -18,7 +18,7 @@
        _MMIO(__to_intel_display(dev_priv)->pps.mmio_base - PPS_BASE + (reg) + 
(pps_idx) * 0x100)
 
 #define _PP_STATUS                     0x61200
-#define PP_STATUS(pps_idx)             _MMIO_PPS(dev_priv, pps_idx, _PP_STATUS)
+#define PP_STATUS(dev_priv, pps_idx)   _MMIO_PPS(dev_priv, pps_idx, _PP_STATUS)
 #define   PP_ON                                REG_BIT(31)
 /*
  * Indicates that all dependencies of the panel are on:
-- 
2.39.2

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