> -----Original Message-----
> From: Hogander, Jouni <jouni.hogan...@intel.com>
> Sent: Tuesday, May 21, 2024 2:17 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.ma...@intel.com>; Kahola, Mika
> <mika.kah...@intel.com>; Hogander, Jouni <jouni.hogan...@intel.com>
> Subject: [PATCH v2 01/17] drm/i915/psr: Store pr_dpcd in intel_dp
>
> We need pr_dpcd contents for early transport validity check on eDP Panel
> Replay and in debugfs interface to dump out panel early transport capability.
>
> Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 19 ++++++-------------
> 2 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 9678c2b157f6..6fbfe8a18f45 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1743,6 +1743,7 @@ struct intel_dp {
> bool use_max_params;
> u8 dpcd[DP_RECEIVER_CAP_SIZE];
> u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> + u8 pr_dpcd;
> u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
> u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index d18baeb971bb..ba92f71b82d9 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -559,20 +559,10 @@ static void intel_dp_get_su_granularity(struct
> intel_dp *intel_dp) static void _panel_replay_init_dpcd(struct intel_dp
> *intel_dp) {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> - u8 pr_dpcd = 0;
> -
> - intel_dp->psr.sink_panel_replay_support = false;
> - drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
> &pr_dpcd);
> -
> - if (!(pr_dpcd & DP_PANEL_REPLAY_SUPPORT)) {
> - drm_dbg_kms(&i915->drm,
> - "Panel replay is not supported by panel\n");
Panel Replat not supported print are we removing purposefully or missed somehow
in refactoring?
Regards,
Animesh
> - return;
> - }
>
> intel_dp->psr.sink_panel_replay_support = true;
>
> - if (pr_dpcd & DP_PANEL_REPLAY_SU_SUPPORT)
> + if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SU_SUPPORT)
> intel_dp->psr.sink_panel_replay_su_support = true;
>
> drm_dbg_kms(&i915->drm,
> @@ -630,10 +620,13 @@ static void _psr_init_dpcd(struct intel_dp
> *intel_dp)
>
> void intel_psr_init_dpcd(struct intel_dp *intel_dp) {
> - _panel_replay_init_dpcd(intel_dp);
> -
> drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp-
> >psr_dpcd,
> sizeof(intel_dp->psr_dpcd));
> + drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
> + &intel_dp->pr_dpcd);
> +
> + if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SUPPORT)
> + _panel_replay_init_dpcd(intel_dp);
>
> if (intel_dp->psr_dpcd[0])
> _psr_init_dpcd(intel_dp);
> --
> 2.34.1
