We need bigjoiner support with MST functionality
for MST monitor resolutions > 5K to work.
Adding support for the same.

Signed-off-by: Vidya Srinivas <vidya.srini...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b062f4ee6c8b..c5e7293c13eb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder 
*encoder,
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_atomic_state *state = 
to_intel_atomic_state(conn_state->state);
+       struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
        struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
        struct intel_dp *intel_dp = &intel_mst->primary->dp;
        const struct intel_connector *connector =
@@ -542,6 +543,10 @@ static int intel_dp_mst_compute_config(struct 
intel_encoder *encoder,
        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
                return -EINVAL;
 
+       if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
+                                   adjusted_mode->crtc_clock))
+               pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, 
crtc->pipe);
+
        pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
        pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
        pipe_config->has_pch_encoder = false;
@@ -1330,12 +1335,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
*connector,
         *   corresponding link capabilities of the sink) in case the
         *   stream is uncompressed for it by the last branch device.
         */
-       if (mode_rate > max_rate || mode->clock > max_dotclk ||
-           drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {
-               *status = MODE_CLOCK_HIGH;
-               return 0;
-       }
-
        if (mode->clock < 10000) {
                *status = MODE_CLOCK_LOW;
                return 0;
@@ -1351,6 +1350,12 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
*connector,
                max_dotclk *= 2;
        }
 
+       if (mode_rate > max_rate || mode->clock > max_dotclk ||
+           drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {
+               *status = MODE_CLOCK_HIGH;
+               return 0;
+       }
+
        if (DISPLAY_VER(dev_priv) >= 10 &&
            drm_dp_sink_supports_dsc(intel_connector->dp.dsc_dpcd)) {
                /*
@@ -1393,7 +1398,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
*connector,
                return 0;
        }
 
-       *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
+       *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner);
        return 0;
 }
 
-- 
2.33.0

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