On Fri, 08 Dec 2023, Ville Syrjälä <ville.syrj...@linux.intel.com> wrote:
> On Mon, Dec 04, 2023 at 10:24:43PM +0200, Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>>
>> plane_view_scanout_stride() currently assumes that we had to pad the
>> mapping stride with dummy pages in order to align it. But that is not
>> the case if the original fb stride exceeds the aligned stride used
>> to populate the remapped view, which is calculated from the user
>> specified framebuffer width rather than the user specified framebuffer
>> stride.
>>
>> Ignore the original fb stride in this case and just stick to the POT
>> aligned stride. Getting this wrong will cause the plane to fetch the
>> wrong data, and can lead to fault errors if the page tables at the
>> bogus location aren't even populated.
>>
>> TODO: figure out if this is OK for CCS, or if we should instead increase
>> the width of the view to cover the entire user specified fb stride
>> instead...
>>
>> Cc: Imre Deak <imre.d...@intel.com>
>> Cc: Juha-Pekka Heikkila <juhapekka.heikk...@gmail.com>
>> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Doh. Apparently I forgot to tag this for stable...
>
> Jani, can you include this w/ cc:stable in the next -fixes pull please?
>
> commit 01a39f1c4f12 ("drm/i915: Fix ADL+ tiled plane stride when the POT
> stride is smaller than the original")
Picked up to drm-intel-fixes with cc: stable.
Thanks,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/display/intel_fb.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
>> b/drivers/gpu/drm/i915/display/intel_fb.c
>> index 33a693460420..ab634a4c86d1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fb.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
>> @@ -1381,7 +1381,8 @@ plane_view_scanout_stride(const struct
>> intel_framebuffer *fb, int color_plane,
>> struct drm_i915_private *i915 = to_i915(fb->base.dev);
>> unsigned int stride_tiles;
>>
>> - if (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
>> + if ((IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14) &&
>> + src_stride_tiles < dst_stride_tiles)
>> stride_tiles = src_stride_tiles;
>> else
>> stride_tiles = dst_stride_tiles;
>> --
>> 2.41.0
--
Jani Nikula, Intel
