On Tue, 11 Jul 2023, Vidya Srinivas <vidya.srini...@intel.com> wrote:
> v2: Add Jani Nikula's change for quirk for sync polarity
This was a quick hack suggestion to try. If it works, I think it works
by concidence, because a fastset won't update the sync flags in
TRANS_DDI_FUNC_CTL register. Did not check whether they can even be
updated while the transcoder is enabled.
> CC: Jani Nikula <jani.nik...@intel.com>
> Credits-to: Jani Nikula <jani.nik...@intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srini...@intel.com>
It would be useful to have a bug report at fdo gitlab with the EDID
attached.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_panel.c | 10 ++++++----
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 43cba98f7753..088b45e032aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5234,7 +5234,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
> *current_config,
> PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_INTERLACE);
>
> - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS) && !fastset) {
> PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_PHSYNC);
> PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 9232a305b1e6..b9eeaedabd22 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -112,10 +112,12 @@ intel_panel_fixed_mode(struct intel_connector
> *connector,
> static bool is_alt_drrs_mode(const struct drm_display_mode *mode,
> const struct drm_display_mode *preferred_mode)
> {
> - return drm_mode_match(mode, preferred_mode,
> - DRM_MODE_MATCH_TIMINGS |
> - DRM_MODE_MATCH_FLAGS |
> - DRM_MODE_MATCH_3D_FLAGS) &&
> + u32 sync_flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC |
> + DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC;
> +
> + return (mode->flags & ~sync_flags) == (preferred_mode->flags &
> ~sync_flags) &&
> + mode->hdisplay == preferred_mode->hdisplay &&
> + mode->vdisplay == preferred_mode->vdisplay &&
> mode->clock != preferred_mode->clock;
> }
--
Jani Nikula, Intel Open Source Graphics Center
