> -----Original Message-----
> From: Bhadane, Dnyaneshwar <dnyaneshwar.bhad...@intel.com>
> Sent: Thursday, June 15, 2023 2:54 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srivatsa, Anusha <anusha.sriva...@intel.com>
> Subject: [PATCH 10/11] drm/i915/adls: s/ADLS/ALDERLAKE_S in platform and
> subplatform defines
>
> From: Anusha Srivatsa <anusha.sriva...@intel.com>
>
> Driver refers to the platfrom Alderlake S as ADLS in places and ALDERLAKE_S in
^^^ same typo again!
Anusha
> some. Making the consistent change to avoid confusion of the right naming
> convention for the platform.
>
> Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 6 +++---
> drivers/gpu/drm/i915/intel_step.c | 2 +-
> 4 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 3fd30e7f0062..f3090b8afc60 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -797,7 +797,7 @@ void intel_display_device_info_runtime_init(struct
> drm_i915_private *i915)
> enum pipe pipe;
>
> /* Wa_14011765242: adl-s A0,A1 */
> - if (IS_ADLS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
> + if (IS_ALDERLAKE_S_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
> for_each_pipe(i915, pipe)
> display_runtime->num_scalers[pipe] = 0;
> else if (DISPLAY_VER(i915) >= 11) {
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 18250fb64bd8..eb28705b88bd 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -43,7 +43,7 @@ static void uc_expand_default_options(struct intel_uc *uc)
> }
>
> /* Intermediate platforms are HuC authentication only */
> - if (IS_ALDERLAKE_S(i915) && !IS_ADLS_RPLS(i915)) {
> + if (IS_ALDERLAKE_S(i915) && !IS_ALDERLAKE_S_RPLS(i915)) {
> i915->params.enable_guc = ENABLE_GUC_LOAD_HUC;
> return;
> }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d3ce6ed3be86..1dad0c9b4f30 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -585,7 +585,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11)
> #define IS_DG2_G12(i915) \
> IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12) -
> #define IS_ADLS_RPLS(i915) \
> +#define IS_ALDERLAKE_S_RPLS(i915) \
> IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S,
> INTEL_SUBPLATFORM_RPL) #define IS_ALDERLAKE_P_N(i915) \
> IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P,
> INTEL_SUBPLATFORM_N) @@ -669,11 +669,11 @@ IS_SUBPLATFORM(const
> struct drm_i915_private *i915, #define IS_ROCKETLAKE_DISPLAY_STEP(p, since,
> until) \
> (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))
>
> -#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
> +#define IS_ALDERLAKE_S_DISPLAY_STEP(__i915, since, until) \
> (IS_ALDERLAKE_S(__i915) && \
> IS_DISPLAY_STEP(__i915, since, until))
>
> -#define IS_ADLS_GRAPHICS_STEP(__i915, since, until) \
> +#define IS_ALDERLAKE_GRAPHICS_STEP(__i915, since, until) \
> (IS_ALDERLAKE_S(__i915) && \
> IS_GRAPHICS_STEP(__i915, since, until))
>
> diff --git a/drivers/gpu/drm/i915/intel_step.c
> b/drivers/gpu/drm/i915/intel_step.c
> index fe447063a064..f410aa2a8077 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -201,7 +201,7 @@ void intel_step_init(struct drm_i915_private *i915)
> } else if (IS_ALDERLAKE_P(i915)) {
> revids = adlp_revids;
> size = ARRAY_SIZE(adlp_revids);
> - } else if (IS_ADLS_RPLS(i915)) {
> + } else if (IS_ALDERLAKE_S_RPLS(i915)) {
> revids = adls_rpls_revids;
> size = ARRAY_SIZE(adls_rpls_revids);
> } else if (IS_ALDERLAKE_S(i915)) {
> --
> 2.34.1
