On Tue, 2023-05-02 at 09:38 -0700, Ceraolo Spurio, Daniele wrote: > The GSC notifies us of a proxy request via the HECI2 interrupt. The > interrupt must be enabled both in the HECI layer and in our usual gt irq > programming; for the latter, the interrupt is enabled via the same enable > register as the GSC CS, but it does have its own mask register. When the > interrupt is received, we also need to de-assert it in both layers. > > The handling of the proxy request is deferred to the same worker that we > use for GSC load. New flags have been added to distinguish between the > init case and the proxy interrupt. > > v2: Make sure not to set the reset bit when enabling/disabling the GSC > interrupts, fix defines (Alan) > > v3: rebase on proxy status register check > alan:snip Reviewed-by: Alan Previn <alan.previn.teres.ale...@intel.com>
- [Intel-gfx] [PATCH v3 0/4] drm/i915: Add support... Daniele Ceraolo Spurio
- [Intel-gfx] [PATCH v3 2/4] mei: gsc_proxy: ... Daniele Ceraolo Spurio
- Re: [Intel-gfx] [PATCH v3 2/4] mei: gsc... Teres Alexis, Alan Previn
- [Intel-gfx] [PATCH v3 1/4] drm/i915/mtl: De... Daniele Ceraolo Spurio
- Re: [Intel-gfx] [PATCH v3 1/4] drm/i915... Teres Alexis, Alan Previn
- [Intel-gfx] [PATCH v3 3/4] drm/i915/gsc: ad... Daniele Ceraolo Spurio
- Re: [Intel-gfx] [PATCH v3 3/4] drm/i915... Teres Alexis, Alan Previn
- [Intel-gfx] [PATCH v3 4/4] drm/i915/gsc: ad... Daniele Ceraolo Spurio
- Re: [Intel-gfx] [PATCH v3 4/4] drm/i915... Teres Alexis, Alan Previn
- [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm... Patchwork
- [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for... Patchwork
- [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i9... Patchwork
- [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i9... Patchwork