On Thu, 16 Jan 2014, Daniel Vetter <daniel.vet...@ffwll.ch> wrote:
> This was forgotten in
>
> commit 565ee3897f0cb1e9b09905747b3784e6605767e8
> Author: Jani Nikula <jani.nik...@intel.com>
> Date: Wed Nov 13 12:56:29 2013 +0200
>
> drm/i915: do not save/restore backlight registers in KMS
>
> Since the confusion was likely due to the duplicated definition for
> this pci config register, let's unify that, too.
Nah, it was just an oversight from my part. Thanks for catching.
I could nitpick about also doing s/saveLBB/savePCI_LBPC/ or similar, but
no biggie.
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
>
> Cc: Jani Nikula <jani.nik...@intel.com>
> Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> drivers/gpu/drm/i915/i915_suspend.c | 8 --------
> drivers/gpu/drm/i915/i915_ums.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_panel.c | 2 --
> 4 files changed, 10 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 76126e0ae609..2f2c111dc388 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -73,7 +73,8 @@
> #define I915_GC_RENDER_CLOCK_166_MHZ (0 << 0)
> #define I915_GC_RENDER_CLOCK_200_MHZ (1 << 0)
> #define I915_GC_RENDER_CLOCK_333_MHZ (4 << 0)
> -#define LBB 0xf4
> +#define PCI_LBPC 0xf4 /* legacy/combination backlight modes, also called LBB
> */
> +
>
> /* Graphics reset regs */
> #define I965_GDRST 0xc0 /* PCI config register */
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
> b/drivers/gpu/drm/i915/i915_suspend.c
> index 8150fdc08d49..e6c90d1382b3 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -324,10 +324,6 @@ int i915_save_state(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> int i;
>
> - if (INTEL_INFO(dev)->gen <= 4)
> - pci_read_config_byte(dev->pdev, LBB,
> - &dev_priv->regfile.saveLBB);
> -
> mutex_lock(&dev->struct_mutex);
>
> i915_save_display(dev);
> @@ -377,10 +373,6 @@ int i915_restore_state(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> int i;
>
> - if (INTEL_INFO(dev)->gen <= 4)
> - pci_write_config_byte(dev->pdev, LBB,
> - dev_priv->regfile.saveLBB);
> -
> mutex_lock(&dev->struct_mutex);
>
> i915_gem_restore_fences(dev);
> diff --git a/drivers/gpu/drm/i915/i915_ums.c b/drivers/gpu/drm/i915/i915_ums.c
> index caa18e855815..480da593e6c0 100644
> --- a/drivers/gpu/drm/i915/i915_ums.c
> +++ b/drivers/gpu/drm/i915/i915_ums.c
> @@ -271,6 +271,10 @@ void i915_save_display_reg(struct drm_device *dev)
> /* FIXME: regfile.save TV & SDVO state */
>
> /* Backlight */
> + if (INTEL_INFO(dev)->gen <= 4)
> + pci_read_config_byte(dev->pdev, PCI_LBPC,
> + &dev_priv->regfile.saveLBB);
> +
> if (HAS_PCH_SPLIT(dev)) {
> dev_priv->regfile.saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
> dev_priv->regfile.saveBLC_PWM_CTL2 =
> I915_READ(BLC_PWM_PCH_CTL2);
> @@ -293,6 +297,10 @@ void i915_restore_display_reg(struct drm_device *dev)
> int i;
>
> /* Backlight */
> + if (INTEL_INFO(dev)->gen <= 4)
> + pci_write_config_byte(dev->pdev, PCI_LBPC,
> + dev_priv->regfile.saveLBB);
> +
> if (HAS_PCH_SPLIT(dev)) {
> I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->regfile.saveBLC_PWM_CTL);
> I915_WRITE(BLC_PWM_PCH_CTL2,
> dev_priv->regfile.saveBLC_PWM_CTL2);
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index 20ebc3e83d39..64a66bc3d54f 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -33,8 +33,6 @@
> #include <linux/moduleparam.h>
> #include "intel_drv.h"
>
> -#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
> -
> void
> intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
> struct drm_display_mode *adjusted_mode)
> --
> 1.8.5.2
>
--
Jani Nikula, Intel Open Source Technology Center
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