On Thu, 19 Dec 2013 19:12:30 -0200 Paulo Zanoni <przan...@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zan...@intel.com> > > Because on Haswell, the pipe is never running at this point, so we hit > the 50ms timeout waiting for nothing. We already have two other places > where we wait for vblanks on haswell_crtc_enable, so we're safe. > > This gets us rid of one instance of "vblank wait timed out" for each > mode set, which means driver init and resume are also 50ms faster. > > Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 6865fa2..f0f78d3 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -3706,7 +3706,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) > > intel_update_watermarks(crtc); > intel_enable_pipe(dev_priv, pipe, > - intel_crtc->config.has_pch_encoder, false, true); > + intel_crtc->config.has_pch_encoder, false, false); > > if (intel_crtc->config.has_pch_encoder) > lpt_pch_enable(crtc); Reviewed-by: Jesse Barnes <jbar...@virtuousgeek.org> -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
