[Intel-gfx] [PATCH 3/5] drm/i915/psr: Add the latency reporting chicken bit for pipe D

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Pipe D has a chicken bit for the latency reporting override
thing as well. Add it.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 2 ++
 drivers/gpu/drm/i915/i915_reg.h          | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 70bd4e69834c..a233510b2162 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1112,6 +1112,8 @@ static u32 wa_16013835468_bit_get(struct intel_dp 
*intel_dp)
                return LATENCY_REPORTING_REMOVED_PIPE_B;
        case PIPE_C:
                return LATENCY_REPORTING_REMOVED_PIPE_C;
+       case PIPE_D:
+               return LATENCY_REPORTING_REMOVED_PIPE_D;
        default:
                MISSING_CASE(intel_dp->psr.pipe);
                return 0;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8b2cf980f323..b0b3b511e19f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5737,6 +5737,7 @@
 #define  RESET_PCH_HANDSHAKE_ENABLE    REG_BIT(4)
 
 #define GEN8_CHICKEN_DCPR_1                    _MMIO(0x46430)
+#define   LATENCY_REPORTING_REMOVED_PIPE_D     REG_BIT(31)
 #define   SKL_SELECT_ALTERNATE_DC_EXIT         REG_BIT(30)
 #define   LATENCY_REPORTING_REMOVED_PIPE_C     REG_BIT(25)
 #define   LATENCY_REPORTING_REMOVED_PIPE_B     REG_BIT(24)
-- 
2.38.2