We had 2 set of defines for the same register, so make it one.

Signed-off-by: Damien Lespiau <damien.lesp...@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      | 18 ++++++++----------
 drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
 drivers/gpu/drm/i915/intel_display.c |  3 +--
 3 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 67e9673..c6d9ba5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4116,13 +4116,14 @@
 #define  ILK_ELPIN_409_SELECT  (1 << 25)
 #define  ILK_DPARB_GATE        (1<<22)
 #define  ILK_VSDPFD_FULL       (1<<21)
-#define ILK_DISPLAY_CHICKEN_FUSES      0x42014
-#define  ILK_INTERNAL_GRAPHICS_DISABLE (1<<31)
-#define  ILK_INTERNAL_DISPLAY_DISABLE  (1<<30)
-#define  ILK_DISPLAY_DEBUG_DISABLE     (1<<29)
-#define  ILK_HDCP_DISABLE              (1<<25)
-#define  ILK_eDP_A_DISABLE             (1<<24)
-#define  ILK_DESKTOP                   (1<<23)
+#define FUSE_STRAP                     0x42014
+#define  ILK_INTERNAL_GRAPHICS_DISABLE (1 << 31)
+#define  ILK_INTERNAL_DISPLAY_DISABLE  (1 << 30)
+#define  ILK_DISPLAY_DEBUG_DISABLE     (1 << 29)
+#define  ILK_HDCP_DISABLE              (1 << 25)
+#define  ILK_eDP_A_DISABLE             (1 << 24)
+#define  HSW_CDCLK_LIMIT               (1 << 24)
+#define  ILK_DESKTOP                   (1 << 23)
 
 #define ILK_DSPCLK_GATE_D                      0x42020
 #define   ILK_VRHUNIT_CLOCK_GATE_DISABLE       (1 << 28)
@@ -4174,9 +4175,6 @@
 #define HSW_SCRATCH1                           0xb038
 #define  HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE  (1<<27)
 
-#define HSW_FUSE_STRAP         0x42014
-#define  HSW_CDCLK_LIMIT       (1 << 24)
-
 /* PCH */
 
 /* south display engine interrupt: IBX */
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 3a14d99..24f49b6 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1246,7 +1246,7 @@ int intel_ddi_get_cdclk_freq(struct drm_i915_private 
*dev_priv)
 
        if (lcpll & LCPLL_CD_SOURCE_FCLK) {
                return 800000;
-       } else if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT) {
+       } else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT) {
                return 450000;
        } else if (freq == LCPLL_CLK_FREQ_450) {
                return 450000;
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 46e0688..561b95e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10235,8 +10235,7 @@ static bool has_edp_a(struct drm_device *dev)
        if ((I915_READ(DP_A) & DP_DETECTED) == 0)
                return false;
 
-       if (IS_GEN5(dev) &&
-           (I915_READ(ILK_DISPLAY_CHICKEN_FUSES) & ILK_eDP_A_DISABLE))
+       if (IS_GEN5(dev) && (I915_READ(FUSE_STRAP) & ILK_eDP_A_DISABLE))
                return false;
 
        return true;
-- 
1.8.3.1

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