Thanks Daniel. -----Original Message----- From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, December 4, 2013 2:10 PM To: S, Deepak Cc: Chris Wilson; intel-gfx Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2
[re-adding intel-gfx] On Tue, Dec 3, 2013 at 5:05 PM, S, Deepak <deepa...@intel.com> wrote: > Hi Daniel/Chris, > > I spent some time in digging through the specs and also has chatted with > couple of people. Below is my understanding of the FIFO. > > "On SB, Out of 64 FIFO Entries, 20 Entries will be used by HW and remaining > 44 will be used by the SW,. I think due to this reason, we have a threshold > of 20 Entries." > > "On VLV, HW and SW can access all 64 fifo entries, I don't think having a > threshold of 20 Entries is mandatory on VLV. Also, since both SW and HW can > access all 64 Entries. I think on VLV, we need to update the fifo_count > before waiting for the FIFO." > > Please correct me if I am working. Looks sane. I've added this to the commit message and merged your patch. Thanks, Daniel > > Thanks > Deepak > > -----Original Message----- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of > Daniel Vetter > Sent: Friday, November 29, 2013 7:33 PM > To: S, Deepak > Cc: Chris Wilson; intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO > and wait for 20 free entries. v2 > > On Fri, Nov 29, 2013 at 11:53:44AM +0000, S, Deepak wrote: >> Sure Chris, I will recheck the spec and change the commit accordingly. > > I guess the big question is why vlv is special. We've had these 20 fifo > entries ever since gen6, so I'd also really like to know what suddenly > changed. Even the 20 entries have just been copied from a spec with no > explation. So if this is to allow hw writes to the gt from the display, then > I guess we would need this change on all gen6+ platforms? > > Hence digging through specs or dragging a hw engineer into this discussion > would be highly appreciated. > > Thanks, Daniel > >> >> -----Original Message----- >> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] >> Sent: Friday, November 29, 2013 5:07 PM >> To: S, Deepak >> Cc: intel-gfx@lists.freedesktop.org >> Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for >> FIFO and wait for 20 free entries. v2 >> >> On Fri, Nov 29, 2013 at 11:22:32AM +0000, S, Deepak wrote: >> > Hi Chris, >> > >> > In VLV, both hardware and software can use the write fifo in parallel, we >> > are adding this change as a water mark to make sure we atleast have 20 >> > free entries .This will help us to avoid software mmio write being dropped. >> >> Please think some more and describe the change exactly. >> -Chris >> >> -- >> Chris Wilson, Intel Open Source Technology Centre >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
