On Thu, 2013-11-21 at 13:47 -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zan...@intel.com>
>
> This patch adds the initial infrastructure to allow a Runtime PM
> implementation that sets the device to its D3 state. The patch just
> adds the necessary callbacks and the initial infrastructure.
>
> We still don't have any platform that actually uses this
> infrastructure, we still don't call get/put in all the places we need
> to, and we don't have any function to save/restore the state of the
> registers. This is not a problem since no platform uses the code added
> by this patch. We have a few people simultaneously working on runtime
> PM, so this initial code could help everybody make their plans.
>
> V2: - Move some functions to intel_pm.c
> - Remove useless pm_runtime_allow() call at init
> - Remove useless pm_runtime_mark_last_busy() call at get
> - Use pm_runtime_get_sync() instead of 2 calls
> - Add a WARN to check if we're really awake
>
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 6 ++++
> drivers/gpu/drm/i915/i915_drv.c | 42 ++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_drv.h | 7 +++++
> drivers/gpu/drm/i915/intel_drv.h | 4 +++
> drivers/gpu/drm/i915/intel_pm.c | 56
> +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_uncore.c | 9 ++++++
> 6 files changed, 124 insertions(+)
> [...]
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6bd0fc6..ef5e274 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -31,6 +31,7 @@
> #include "../../../platform/x86/intel_ips.h"
> #include <linux/module.h>
> #include <drm/i915_powerwell.h>
> +#include <linux/pm_runtime.h>
>
> /**
> * RC6 is a special power stage which allows the GPU to enter an very
> @@ -5878,6 +5879,61 @@ void intel_aux_display_runtime_put(struct
> drm_i915_private *dev_priv)
> hsw_enable_package_c8(dev_priv);
> }
>
> +void intel_runtime_pm_get(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + struct device *device = &dev->pdev->dev;
> +
> + if (!HAS_RUNTIME_PM(dev))
> + return;
> +
> + pm_runtime_get_sync(device);
> + WARN(dev_priv->pm.suspended, "Device still suspended.\n");
> +}
> +
> +void intel_runtime_pm_put(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + struct device *device = &dev->pdev->dev;
> +
> + if (!HAS_RUNTIME_PM(dev))
> + return;
> +
> + pm_runtime_mark_last_busy(device);
> + pm_runtime_put_autosuspend(device);
> +}
> +
> +void intel_init_runtime_pm(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + struct device *device = &dev->pdev->dev;
> +
> + dev_priv->pm.suspended = false;
> +
> + if (!HAS_RUNTIME_PM(dev))
> + return;
> +
> + pm_runtime_set_active(device);
> + pm_runtime_enable(device);
This will generate a warning as you get here with an already enabled
state.
--Imre
> + pm_runtime_set_autosuspend_delay(device, 10000); /* 10s */
> + pm_runtime_mark_last_busy(device);
> + pm_runtime_use_autosuspend(device);
> +}
> +
> +void intel_fini_runtime_pm(struct drm_i915_private *dev_priv)
> +{
> + struct drm_device *dev = dev_priv->dev;
> + struct device *device = &dev->pdev->dev;
> +
> + if (!HAS_RUNTIME_PM(dev))
> + return;
> +
> + /* Make sure we're not suspended first. */
> + pm_runtime_get_sync(device);
> + pm_runtime_disable(device);
> +}
> +
> /* Set up chip specific power management-related functions */
> void intel_init_pm(struct drm_device *dev)
> {
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index eac5661..ddd9084 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -346,6 +346,13 @@ hsw_unclaimed_reg_check(struct drm_i915_private
> *dev_priv, u32 reg)
> }
> }
>
> +static void
> +assert_device_not_suspended(struct drm_i915_private *dev_priv)
> +{
> + WARN(HAS_RUNTIME_PM(dev_priv->dev) && dev_priv->pm.suspended,
> + "Device suspended\n");
> +}
> +
> #define REG_READ_HEADER(x) \
> unsigned long irqflags; \
> u##x val = 0; \
> @@ -438,6 +445,7 @@ gen6_write##x(struct drm_i915_private *dev_priv, off_t
> reg, u##x val, bool trace
> if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
> __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
> } \
> + assert_device_not_suspended(dev_priv); \
> __raw_i915_write##x(dev_priv, reg, val); \
> if (unlikely(__fifo_ret)) { \
> gen6_gt_check_fifodbg(dev_priv); \
> @@ -453,6 +461,7 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t
> reg, u##x val, bool trace)
> if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
> __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
> } \
> + assert_device_not_suspended(dev_priv); \
> hsw_unclaimed_reg_clear(dev_priv, reg); \
> __raw_i915_write##x(dev_priv, reg, val); \
> if (unlikely(__fifo_ret)) { \
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