Hi,
On Wed, Sep 07, 2022 at 10:21:53PM -0700, Ashutosh Dixit wrote:
> Perf limit reasons bit positions were off by one.
>
> Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
> Cc: sta...@vger.kernel.org # v5.18+
> Cc: Sujaritha Sundaresan <sujaritha.sundare...@intel.com>
> Cc: Andi Shyti <andi.sh...@linux.intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.di...@intel.com>
Thanks Ashutosh!
> ---
> drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c413eec3373f..24009786f88b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1794,14 +1794,14 @@
>
> #define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8)
> #define GT0_PERF_LIMIT_REASONS_MASK 0xde3
> -#define PROCHOT_MASK REG_BIT(1)
> -#define THERMAL_LIMIT_MASK REG_BIT(2)
> -#define RATL_MASK REG_BIT(6)
> -#define VR_THERMALERT_MASK REG_BIT(7)
> -#define VR_TDC_MASK REG_BIT(8)
> -#define POWER_LIMIT_4_MASK REG_BIT(9)
> -#define POWER_LIMIT_1_MASK REG_BIT(11)
> -#define POWER_LIMIT_2_MASK REG_BIT(12)
> +#define PROCHOT_MASK REG_BIT(0)
> +#define THERMAL_LIMIT_MASK REG_BIT(1)
> +#define RATL_MASK REG_BIT(5)
> +#define VR_THERMALERT_MASK REG_BIT(6)
> +#define VR_TDC_MASK REG_BIT(7)
> +#define POWER_LIMIT_4_MASK REG_BIT(8)
> +#define POWER_LIMIT_1_MASK REG_BIT(10)
> +#define POWER_LIMIT_2_MASK REG_BIT(11)
Sujaritha, could you please check and r-b this one?
Thanks,
Andi
