We need to inform PCODE of a desired ring frequencies so PCODE update
the memory frequencies to us. rps->min_freq and rps->max_freq are the
frequencies used in that request. However they were unset when SLPC was
enabled and PCODE never updated the memory freq.

v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right
   frequencies from the get_ia_constants instead of the fake init of
   rps' min and max.

v3: don't forget the max <= min return

Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
Cc: <sta...@vger.kernel.org> # v5.15+
Cc: Ashutosh Dixit <ashutosh.di...@intel.com>
Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.re...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_llc.c | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c 
b/drivers/gpu/drm/i915/gt/intel_llc.c
index 14fe65812e42..2677d62573d9 100644
--- a/drivers/gpu/drm/i915/gt/intel_llc.c
+++ b/drivers/gpu/drm/i915/gt/intel_llc.c
@@ -49,13 +49,28 @@ static unsigned int cpu_max_MHz(void)
 static bool get_ia_constants(struct intel_llc *llc,
                             struct ia_constants *consts)
 {
+       struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc;
        struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
        struct intel_rps *rps = &llc_to_gt(llc)->rps;
 
        if (!HAS_LLC(i915) || IS_DGFX(i915))
                return false;
 
-       if (rps->max_freq <= rps->min_freq)
+       if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) {
+               consts->min_gpu_freq = slpc->min_freq;
+               consts->max_gpu_freq = slpc->rp0_freq;
+       } else {
+               consts->min_gpu_freq = rps->min_freq;
+               consts->max_gpu_freq = rps->max_freq;
+       }
+
+       if (GRAPHICS_VER(i915) >= 9) {
+               /* Convert GT frequency to 50 HZ units */
+               consts->min_gpu_freq /= GEN9_FREQ_SCALER;
+               consts->max_gpu_freq /= GEN9_FREQ_SCALER;
+       }
+
+       if (consts->max_gpu_freq <= consts->min_gpu_freq)
                return false;
 
        consts->max_ia_freq = cpu_max_MHz();
@@ -65,13 +80,6 @@ static bool get_ia_constants(struct intel_llc *llc,
        /* convert DDR frequency from units of 266.6MHz to bandwidth */
        consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3);
 
-       consts->min_gpu_freq = rps->min_freq;
-       consts->max_gpu_freq = rps->max_freq;
-       if (GRAPHICS_VER(i915) >= 9) {
-               /* Convert GT frequency to 50 HZ units */
-               consts->min_gpu_freq /= GEN9_FREQ_SCALER;
-               consts->max_gpu_freq /= GEN9_FREQ_SCALER;
-       }
 
        return true;
 }
-- 
2.37.1

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