From: Paulo Zanoni <paulo.r.zan...@intel.com>
Now that we are actually setting the device to the D3 state, we should
issue the notification.
Jani originally wrote a similar patch for PC8, but then we discovered
that we were not really changing the PCI D states when
enabling/disabling PC8, so we had to postpone his patch.
Cc: Jani Nikula <jani.nik...@intel.com>
Credits-to: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d7ff095..b133836 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -914,6 +914,7 @@ static int i915_runtime_suspend(struct device *device)
dev_priv->pm.suspended = true;
+ intel_opregion_notify_adapter(dev, PCI_D3cold);
pci_save_state(pdev);
pci_set_power_state(pdev, PCI_D3cold);
@@ -932,6 +933,7 @@ static int i915_runtime_resume(struct device *device)
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
+ intel_opregion_notify_adapter(dev, PCI_D0);
dev_priv->pm.suspended = false;
--
1.8.3.1
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