No need to update mask value/restrict because
"Pcode only wants to use GV bandwidth value, not the mask value."
for Display version greater than 14.
Bspec: 646365
Cc: Matt Roper <matthew.d.ro...@intel.com>
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada <radhakrishna.srip...@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d73be4bbaaa3..c9250d849e35 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3924,6 +3924,14 @@ void intel_sagv_pre_plane_update(struct
intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
+ /*
+ * No need to update mask value/restrict because
+ * "Pcode only wants to use GV bandwidth value, not the mask value."
+ * for DISPLAY_VER() >= 14.
+ */
+ if (DISPLAY_VER(i915) >= 14)
+ return;
+
/*
* Just return if we can't control SAGV or don't have it.
* This is different from situation when we have SAGV but just can't
@@ -3944,6 +3952,16 @@ void intel_sagv_post_plane_update(struct
intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
+ /*
+ * No need to update mask value/restrict because
+ * "Pcode only wants to use GV bandwidth value, not the mask value."
+ * for DISPLAY_VER() >= 14.
+ *
+ * GV bandwidth will be set by intel_pmdemand_post_plane_update()
+ */
+ if (DISPLAY_VER(i915) >= 14)
+ return;
+
/*
* Just return if we can't control SAGV or don't have it.
* This is different from situation when we have SAGV but just can't
--
2.25.1
