[Intel-gfx] [PATCH v2 13/22] drm/i915/pps: Split PPS init+sanitize in two

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Split the PPS init to something we do at the start of the eDP
probe and a second part we do at the end.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c  |  2 ++
 drivers/gpu/drm/i915/display/intel_pps.c | 30 ++++++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_pps.h |  1 +
 3 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 972c9ed46829..7249b988592d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5222,6 +5222,8 @@ static bool intel_edp_init_connector(struct intel_dp 
*intel_dp,
 
        intel_edp_add_properties(intel_dp);
 
+       intel_pps_init_late(intel_dp);
+
        return true;
 
 out_vdd_off:
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c 
b/drivers/gpu/drm/i915/display/intel_pps.c
index 64bd4ca0edd4..6ab8d971901b 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1050,7 +1050,7 @@ void vlv_pps_init(struct intel_encoder *encoder,
        pps_init_registers(intel_dp, true);
 }
 
-static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
+static void pps_vdd_init(struct intel_dp *intel_dp)
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -1071,8 +1071,6 @@ static void intel_pps_vdd_sanitize(struct intel_dp 
*intel_dp)
        drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref);
        intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
                                                            
intel_aux_power_domain(dig_port));
-
-       edp_panel_vdd_schedule_off(intel_dp);
 }
 
 bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp)
@@ -1366,18 +1364,40 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp)
 
                pps_init_delays(intel_dp);
                pps_init_registers(intel_dp, false);
+               pps_vdd_init(intel_dp);
 
-               intel_pps_vdd_sanitize(intel_dp);
+               if (edp_have_panel_vdd(intel_dp))
+                       edp_panel_vdd_schedule_off(intel_dp);
        }
 }
 
 void intel_pps_init(struct intel_dp *intel_dp)
 {
+       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+       intel_wakeref_t wakeref;
+
        INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);
 
        pps_init_timestamps(intel_dp);
 
-       intel_pps_encoder_reset(intel_dp);
+       with_intel_pps_lock(intel_dp, wakeref) {
+               if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+                       vlv_initial_power_sequencer_setup(intel_dp);
+
+               pps_init_delays(intel_dp);
+               pps_init_registers(intel_dp, false);
+               pps_vdd_init(intel_dp);
+       }
+}
+
+void intel_pps_init_late(struct intel_dp *intel_dp)
+{
+       intel_wakeref_t wakeref;
+
+       with_intel_pps_lock(intel_dp, wakeref) {
+               if (edp_have_panel_vdd(intel_dp))
+                       edp_panel_vdd_schedule_off(intel_dp);
+       }
 }
 
 void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h 
b/drivers/gpu/drm/i915/display/intel_pps.h
index e64144659d31..a3a56f903f26 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -41,6 +41,7 @@ bool intel_pps_have_panel_power_or_vdd(struct intel_dp 
*intel_dp);
 void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
 
 void intel_pps_init(struct intel_dp *intel_dp);
+void intel_pps_init_late(struct intel_dp *intel_dp);
 void intel_pps_encoder_reset(struct intel_dp *intel_dp);
 void intel_pps_reset_all(struct drm_i915_private *i915);
 
-- 
2.35.1