On Fri, 11 Mar 2022, Ashutosh Dixit <ashutosh.di...@intel.com> wrote:
> Because VLV_GT_RENDER_RC6 == GEN6_GT_GFX_RC6, the IS_VALLEYVIEW() check is
> not needed. Neither is the check present in other code paths which call
> intel_rc6_residency_ns() (in functions gen6_drpc(), rc6_residency() and
> rc6_residency_ms_show()).

How about removing the dupe register macro while at it so no new users
show up?

BR,
Jani.

>
> Signed-off-by: Ashutosh Dixit <ashutosh.di...@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pmu.c | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index cfc21042499d..3e3b09588fd3 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -148,10 +148,7 @@ static u64 __get_rc6(struct intel_gt *gt)
>       struct drm_i915_private *i915 = gt->i915;
>       u64 val;
>  
> -     val = intel_rc6_residency_ns(&gt->rc6,
> -                                  IS_VALLEYVIEW(i915) ?
> -                                  VLV_GT_RENDER_RC6 :
> -                                  GEN6_GT_GFX_RC6);
> +     val = intel_rc6_residency_ns(&gt->rc6, GEN6_GT_GFX_RC6);
>  
>       if (HAS_RC6p(i915))
>               val += intel_rc6_residency_ns(&gt->rc6, GEN6_GT_GFX_RC6p);

-- 
Jani Nikula, Intel Open Source Graphics Center

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