From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Lift the dsc/joiner enable up from the wonky places where it
currently sits (ddi .pre_enable() or icl_ddi_bigjoiner_pre_enable())
into hsw_crtc_enable() where we write the other per-pipe stuff
as well. Makes the transcoder vs. pipe split less confusing.

For DSI this results in slight reordering between the dsc/joiner
enable vs. transcoder timings setup, but I can't really think
why that should cause any issues since the transcoder isn't yet
enabled at that point.

v2: Take care of dsi (Jani)

Cc: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c       |  2 --
 drivers/gpu/drm/i915/display/intel_ddi.c     |  6 ------
 drivers/gpu/drm/i915/display/intel_display.c | 12 +++++-------
 3 files changed, 5 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 95f49535fa6e..16a611f7d659 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1233,8 +1233,6 @@ static void gen11_dsi_pre_enable(struct 
intel_atomic_state *state,
 
        intel_dsc_dsi_pps_write(encoder, pipe_config);
 
-       intel_dsc_enable(pipe_config);
-
        /* step6c: configure transcoder timings */
        gen11_dsi_set_transcoder_timings(encoder, pipe_config);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2f20abc5122d..5d1f7d6218c5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2425,9 +2425,6 @@ static void tgl_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
        intel_ddi_enable_fec(encoder, crtc_state);
 
        intel_dsc_dp_pps_write(encoder, crtc_state);
-
-       if (!crtc_state->bigjoiner)
-               intel_dsc_enable(crtc_state);
 }
 
 static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2493,9 +2490,6 @@ static void hsw_ddi_pre_enable_dp(struct 
intel_atomic_state *state,
                intel_ddi_enable_pipe_clock(encoder, crtc_state);
 
        intel_dsc_dp_pps_write(encoder, crtc_state);
-
-       if (!crtc_state->bigjoiner)
-               intel_dsc_enable(crtc_state);
 }
 
 static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index d2906434ab3f..13b1de03640d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1974,7 +1974,6 @@ static void hsw_set_frame_start_delay(const struct 
intel_crtc_state *crtc_state)
 static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
                                         const struct intel_crtc_state 
*crtc_state)
 {
-       struct drm_i915_private *dev_priv = to_i915(state->base.dev);
        struct intel_crtc_state *master_crtc_state;
        struct intel_crtc *master_crtc;
        struct drm_connector_state *conn_state;
@@ -2004,12 +2003,6 @@ static void icl_ddi_bigjoiner_pre_enable(struct 
intel_atomic_state *state,
 
        if (crtc_state->bigjoiner_slave)
                intel_encoders_pre_enable(state, master_crtc);
-
-       /* need to enable VDSC, which we skipped in pre-enable */
-       intel_dsc_enable(crtc_state);
-
-       if (DISPLAY_VER(dev_priv) >= 13)
-               intel_uncompressed_joiner_enable(crtc_state);
 }
 
 static void hsw_configure_cpu_transcoder(const struct intel_crtc_state 
*crtc_state)
@@ -2057,6 +2050,11 @@ static void hsw_crtc_enable(struct intel_atomic_state 
*state,
                icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);
        }
 
+       intel_dsc_enable(new_crtc_state);
+
+       if (DISPLAY_VER(dev_priv) >= 13)
+               intel_uncompressed_joiner_enable(new_crtc_state);
+
        intel_set_pipe_src_size(new_crtc_state);
        if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
                bdw_set_pipemisc(new_crtc_state);
-- 
2.34.1

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