On Wed, 09 Oct 2013, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Let's try to avoid these confusing negated booleans.
Thanks for such a positive patch!
For the series,
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> drivers/gpu/drm/i915/intel_sprite.c | 8 ++++----
> 4 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index debbd06..27f98bc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1840,9 +1840,9 @@ static void intel_enable_primary_plane(struct
> drm_i915_private *dev_priv,
> /* If the pipe isn't enabled, we can't pump pixels and may hang */
> assert_pipe_enabled(dev_priv, pipe);
>
> - WARN(!intel_crtc->primary_disabled, "Primary plane already enabled\n");
> + WARN(intel_crtc->primary_enabled, "Primary plane already enabled\n");
>
> - intel_crtc->primary_disabled = false;
> + intel_crtc->primary_enabled = true;
>
> reg = DSPCNTR(plane);
> val = I915_READ(reg);
> @@ -1870,9 +1870,9 @@ static void intel_disable_primary_plane(struct
> drm_i915_private *dev_priv,
> int reg;
> u32 val;
>
> - WARN(intel_crtc->primary_disabled, "Primary plane already disabled\n");
> + WARN(!intel_crtc->primary_enabled, "Primary plane already disabled\n");
>
> - intel_crtc->primary_disabled = true;
> + intel_crtc->primary_enabled = false;
>
> reg = DSPCNTR(plane);
> val = I915_READ(reg);
> @@ -10702,7 +10702,7 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
> &crtc->config);
>
> crtc->base.enabled = crtc->active;
> - crtc->primary_disabled = !crtc->active;
> + crtc->primary_enabled = crtc->active;
>
> DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",
> crtc->base.base.id,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 944a406..28f3800d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -321,7 +321,7 @@ struct intel_crtc {
> */
> bool active;
> bool eld_vld;
> - bool primary_disabled; /* is the crtc obscured by a plane? */
> + bool primary_enabled; /* is the primary plane (partially) visible? */
> bool lowfreq_avail;
> struct intel_overlay *overlay;
> struct intel_unpin_work *unpin_work;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 77d63cf..271dcb9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -475,7 +475,7 @@ void intel_update_fbc(struct drm_device *dev)
> */
> list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
> if (intel_crtc_active(tmp_crtc) &&
> - !to_intel_crtc(tmp_crtc)->primary_disabled) {
> + to_intel_crtc(tmp_crtc)->primary_enabled) {
> if (crtc) {
> if (set_no_fbc_reason(dev_priv,
> FBC_MULTIPLE_PIPES))
> DRM_DEBUG_KMS("more than one pipe
> active, disabling compression\n");
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
> b/drivers/gpu/drm/i915/intel_sprite.c
> index e001d2c..8afaad6 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -521,10 +521,10 @@ intel_enable_primary(struct drm_crtc *crtc)
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> int reg = DSPCNTR(intel_crtc->plane);
>
> - if (!intel_crtc->primary_disabled)
> + if (intel_crtc->primary_enabled)
> return;
>
> - intel_crtc->primary_disabled = false;
> + intel_crtc->primary_enabled = true;
>
> I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
> intel_flush_primary_plane(dev_priv, intel_crtc->plane);
> @@ -553,10 +553,10 @@ intel_disable_primary(struct drm_crtc *crtc)
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> int reg = DSPCNTR(intel_crtc->plane);
>
> - if (intel_crtc->primary_disabled)
> + if (!intel_crtc->primary_enabled)
> return;
>
> - intel_crtc->primary_disabled = true;
> + intel_crtc->primary_enabled = false;
>
> mutex_lock(&dev->struct_mutex);
> if (dev_priv->fbc.plane == intel_crtc->plane)
> --
> 1.8.1.5
>
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--
Jani Nikula, Intel Open Source Technology Center
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