On Tue, 19 Oct 2021, Vandita Kulkarni <vandita.kulka...@intel.com> wrote:
> v2: Fix the typo, move out the hardcoding from
>     macro(Jani, Ville)
>
> Fixes: f87c46c43175 ("drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup 
> guardband")
> Signed-off-by: Vandita Kulkarni <vandita.kulka...@intel.com>

Reviewed-by: Jani Nikula <jani.nik...@intel.com>


> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
>  drivers/gpu/drm/i915/i915_reg.h        | 4 +++-
>  2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 168c84a74d30..63dd75c6448a 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1271,7 +1271,8 @@ static void adlp_set_lp_hs_wakeup_gb(struct 
> intel_encoder *encoder)
>       if (DISPLAY_VER(i915) == 13) {
>               for_each_dsi_port(port, intel_dsi->ports)
>                       intel_de_rmw(i915, TGL_DSI_CHKN_REG(port),
> -                                  TGL_DSI_CHKN_LSHS_GB, 0x4);
> +                                  TGL_DSI_CHKN_LSHS_GB_MASK,
> +                                  TGL_DSI_CHKN_LSHS_GB(4));
>       }
>  }
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index d9f7a729333f..749b043a3ee3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -11715,7 +11715,9 @@ enum skl_power_gate {
>  #define TGL_DSI_CHKN_REG(port)               _MMIO_PORT(port,        \
>                                                   _TGL_DSI_CHKN_REG_0, \
>                                                   _TGL_DSI_CHKN_REG_1)
> -#define TGL_DSI_CHKN_LSHS_GB                 REG_GENMASK(15, 12)
> +#define TGL_DSI_CHKN_LSHS_GB_MASK            REG_GENMASK(15, 12)
> +#define TGL_DSI_CHKN_LSHS_GB(byte_clocks)    
> REG_FIELD_PREP(TGL_DSI_CHKN_LSHS_GB_MASK, \
> +                                                            (byte_clocks))
>  
>  /* Display Stream Splitter Control */
>  #define DSS_CTL1                             _MMIO(0x67400)

-- 
Jani Nikula, Intel Open Source Graphics Center

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