On Fri, May 14, 2021 at 03:57:43PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Split g4x_compute_pipe_wm() into two halves. The first half computes
> the new raw watermarks, and the second half munges those up into real
> watermarks for the particular pipe.
>
> We can reuse the second half for watermark sanitation as well.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 52 +++++++++++++++++++--------------
> 1 file changed, 30 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 990ee5a590d3..59a22e1ee5bf 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1366,34 +1366,14 @@ static bool g4x_compute_fbc_en(const struct
> g4x_wm_state *wm_state,
> return true;
> }
>
> -static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> +static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct intel_atomic_state *state =
> - to_intel_atomic_state(crtc_state->uapi.state);
> struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
> u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> const struct g4x_pipe_wm *raw;
> - const struct intel_plane_state *old_plane_state;
> - const struct intel_plane_state *new_plane_state;
> - struct intel_plane *plane;
> enum plane_id plane_id;
> - int i, level;
> - unsigned int dirty = 0;
> -
> - for_each_oldnew_intel_plane_in_state(state, plane,
> - old_plane_state,
> - new_plane_state, i) {
> - if (new_plane_state->hw.crtc != &crtc->base &&
> - old_plane_state->hw.crtc != &crtc->base)
> - continue;
> -
> - if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
> - dirty |= BIT(plane->id);
> - }
> -
> - if (!dirty)
> - return 0;
> + int level;
>
> level = G4X_WM_LEVEL_NORMAL;
> if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
> @@ -1446,6 +1426,34 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state
> *crtc_state)
> return 0;
> }
>
> +static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct intel_atomic_state *state =
> + to_intel_atomic_state(crtc_state->uapi.state);
> + const struct intel_plane_state *old_plane_state;
> + const struct intel_plane_state *new_plane_state;
> + struct intel_plane *plane;
> + unsigned int dirty = 0;
> + int i;
> +
> + for_each_oldnew_intel_plane_in_state(state, plane,
> + old_plane_state,
> + new_plane_state, i) {
> + if (new_plane_state->hw.crtc != &crtc->base &&
> + old_plane_state->hw.crtc != &crtc->base)
> + continue;
> +
> + if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
> + dirty |= BIT(plane->id);
> + }
> +
> + if (!dirty)
> + return 0;
> +
> + return _g4x_compute_pipe_wm(crtc_state);
> +}
> +
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
> static int g4x_compute_intermediate_wm(struct intel_crtc_state
> *new_crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> --
> 2.26.3
>
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