On Mon, Sep 13, 2021 at 10:42:54AM -0700, Radhakrishna Sripada wrote:
> Earlier while calculating derated bw we would use 90% of the calculated
> bw. Starting ADL-P we use a non standard derating. Updating the formulae
> to reflect the same.
> 
> Bspec: 64631
> 
> Fixes: 4d32fe2f14a7 ("drm/i915/adl_p: Update memory bandwidth parameters")
> Cc: Matt Roper <matthew.d.ro...@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.srip...@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index e91e0e0191fb..23121ddd2580 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -222,31 +222,35 @@ static int icl_sagv_max_dclk(const struct 
> intel_qgv_info *qi)
>  
>  struct intel_sa_info {
>       u16 displayrtids;
> -     u8 deburst, deprogbwlimit;
> +     u8 deburst, deprogbwlimit, derating;
>  };
>  
>  static const struct intel_sa_info icl_sa_info = {
>       .deburst = 8,
>       .deprogbwlimit = 25, /* GB/s */
>       .displayrtids = 128,
> +     .derating = 10,
>  };
>  
>  static const struct intel_sa_info tgl_sa_info = {
>       .deburst = 16,
>       .deprogbwlimit = 34, /* GB/s */
>       .displayrtids = 256,
> +     .derating = 10,
>  };
>  
>  static const struct intel_sa_info rkl_sa_info = {
>       .deburst = 16,
>       .deprogbwlimit = 20, /* GB/s */
>       .displayrtids = 128,
> +     .derating = 10,
>  };
>  
>  static const struct intel_sa_info adls_sa_info = {
>       .deburst = 16,
>       .deprogbwlimit = 38, /* GB/s */
>       .displayrtids = 256,
> +     .derating = 20,

This is changing the derating for both ADL-S and ADL-P, but the bspec
says that ADL-S still uses a derating of 10.


Matt

>  };
>  
>  static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct 
> intel_sa_info *sa)
> @@ -302,7 +306,7 @@ static int icl_get_bw_info(struct drm_i915_private 
> *dev_priv, const struct intel
>                       bw = icl_calc_bw(sp->dclk, clpchgroup * 32 * 
> num_channels, ct);
>  
>                       bi->deratedbw[j] = min(maxdebw,
> -                                            bw * 9 / 10); /* 90% */
> +                                            bw * (100 - sa->derating) / 100);
>  
>                       drm_dbg_kms(&dev_priv->drm,
>                                   "BW%d / QGV %d: num_planes=%d 
> deratedbw=%u\n",
> -- 
> 2.20.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

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