On Wed, 08 Sep 2021, Dave Airlie <airl...@gmail.com> wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> This function is only used inside intel_pm.c
> ---
> drivers/gpu/drm/i915/i915_drv.h | 9 ++++++-
> drivers/gpu/drm/i915/intel_pm.c | 48 ++++++++++++++++-----------------
> 2 files changed, 32 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ef903d70ab0b..b93fa19892b5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -323,6 +323,11 @@ struct intel_crtc;
> struct intel_limit;
> struct dpll;
>
> +/* functions used internal in intel_pm.c */
> +struct drm_i915_cg_funcs {
Nitpick, cg here is a bit terse.
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
> + void (*init_clock_gating)(struct drm_i915_private *dev_priv);
> +};
> +
> struct drm_i915_display_funcs {
> void (*get_cdclk)(struct drm_i915_private *dev_priv,
> struct intel_cdclk_config *cdclk_config);
> @@ -365,7 +370,6 @@ struct drm_i915_display_funcs {
> const struct drm_connector_state
> *old_conn_state);
> void (*fdi_link_train)(struct intel_crtc *crtc,
> const struct intel_crtc_state *crtc_state);
> - void (*init_clock_gating)(struct drm_i915_private *dev_priv);
> void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
> /* clock updates for mode set */
> /* cursor updates */
> @@ -969,6 +973,9 @@ struct drm_i915_private {
> /* unbound hipri wq for page flips/plane updates */
> struct workqueue_struct *flip_wq;
>
> + /* pm private clock gating functions */
> + struct drm_i915_cg_funcs cg_funcs;
> +
> /* Display functions */
> struct drm_i915_display_funcs display;
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4054c6f7a2f9..73549e774881 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7871,7 +7871,7 @@ static void i830_init_clock_gating(struct
> drm_i915_private *dev_priv)
>
> void intel_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> - dev_priv->display.init_clock_gating(dev_priv);
> + dev_priv->cg_funcs.init_clock_gating(dev_priv);
> }
>
> void intel_suspend_hw(struct drm_i915_private *dev_priv)
> @@ -7898,52 +7898,52 @@ static void nop_init_clock_gating(struct
> drm_i915_private *dev_priv)
> void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
> {
> if (IS_ALDERLAKE_P(dev_priv))
> - dev_priv->display.init_clock_gating = adlp_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = adlp_init_clock_gating;
> else if (IS_DG1(dev_priv))
> - dev_priv->display.init_clock_gating = dg1_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = dg1_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 12)
> - dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating =
> gen12lp_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 11)
> - dev_priv->display.init_clock_gating = icl_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = icl_init_clock_gating;
> else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
> - dev_priv->display.init_clock_gating = cfl_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = cfl_init_clock_gating;
> else if (IS_SKYLAKE(dev_priv))
> - dev_priv->display.init_clock_gating = skl_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = skl_init_clock_gating;
> else if (IS_KABYLAKE(dev_priv))
> - dev_priv->display.init_clock_gating = kbl_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = kbl_init_clock_gating;
> else if (IS_BROXTON(dev_priv))
> - dev_priv->display.init_clock_gating = bxt_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = bxt_init_clock_gating;
> else if (IS_GEMINILAKE(dev_priv))
> - dev_priv->display.init_clock_gating = glk_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = glk_init_clock_gating;
> else if (IS_BROADWELL(dev_priv))
> - dev_priv->display.init_clock_gating = bdw_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = bdw_init_clock_gating;
> else if (IS_CHERRYVIEW(dev_priv))
> - dev_priv->display.init_clock_gating = chv_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = chv_init_clock_gating;
> else if (IS_HASWELL(dev_priv))
> - dev_priv->display.init_clock_gating = hsw_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = hsw_init_clock_gating;
> else if (IS_IVYBRIDGE(dev_priv))
> - dev_priv->display.init_clock_gating = ivb_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = ivb_init_clock_gating;
> else if (IS_VALLEYVIEW(dev_priv))
> - dev_priv->display.init_clock_gating = vlv_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = vlv_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 6)
> - dev_priv->display.init_clock_gating = gen6_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = gen6_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 5)
> - dev_priv->display.init_clock_gating = ilk_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = ilk_init_clock_gating;
> else if (IS_G4X(dev_priv))
> - dev_priv->display.init_clock_gating = g4x_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = g4x_init_clock_gating;
> else if (IS_I965GM(dev_priv))
> - dev_priv->display.init_clock_gating = i965gm_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = i965gm_init_clock_gating;
> else if (IS_I965G(dev_priv))
> - dev_priv->display.init_clock_gating = i965g_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = i965g_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 3)
> - dev_priv->display.init_clock_gating = gen3_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = gen3_init_clock_gating;
> else if (IS_I85X(dev_priv) || IS_I865G(dev_priv))
> - dev_priv->display.init_clock_gating = i85x_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = i85x_init_clock_gating;
> else if (GRAPHICS_VER(dev_priv) == 2)
> - dev_priv->display.init_clock_gating = i830_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = i830_init_clock_gating;
> else {
> MISSING_CASE(INTEL_DEVID(dev_priv));
> - dev_priv->display.init_clock_gating = nop_init_clock_gating;
> + dev_priv->cg_funcs.init_clock_gating = nop_init_clock_gating;
> }
> }
--
Jani Nikula, Intel Open Source Graphics Center
