On Thu, May 06, 2021 at 12:13:45PM -0700, Matthew Brost wrote:
> From: Michal Wajdeczko <michal.wajdec...@intel.com>
> 
> Base offset and count of the GuC scratch registers, used for
> sending MMIO messages to GuC, can be initialized earlier with
> other GuC members that also depends on platform.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdec...@intel.com>
> Signed-off-by: Matthew Brost <matthew.br...@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>

Reviewed-by: Matthew Brost <matthew.br...@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/uc/intel_guc.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 454c8d886499..235c1997f32d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -60,15 +60,8 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
>       enum forcewake_domains fw_domains = 0;
>       unsigned int i;
>  
> -     if (INTEL_GEN(gt->i915) >= 11) {
> -             guc->send_regs.base =
> -                             i915_mmio_reg_offset(GEN11_SOFT_SCRATCH(0));
> -             guc->send_regs.count = GEN11_SOFT_SCRATCH_COUNT;
> -     } else {
> -             guc->send_regs.base = i915_mmio_reg_offset(SOFT_SCRATCH(0));
> -             guc->send_regs.count = GUC_MAX_MMIO_MSG_LEN;
> -             BUILD_BUG_ON(GUC_MAX_MMIO_MSG_LEN > SOFT_SCRATCH_COUNT);
> -     }
> +     GEM_BUG_ON(!guc->send_regs.base);
> +     GEM_BUG_ON(!guc->send_regs.count);
>  
>       for (i = 0; i < guc->send_regs.count; i++) {
>               fw_domains |= intel_uncore_forcewake_for_reg(gt->uncore,
> @@ -181,11 +174,18 @@ void intel_guc_init_early(struct intel_guc *guc)
>               guc->interrupts.reset = gen11_reset_guc_interrupts;
>               guc->interrupts.enable = gen11_enable_guc_interrupts;
>               guc->interrupts.disable = gen11_disable_guc_interrupts;
> +             guc->send_regs.base =
> +                     i915_mmio_reg_offset(GEN11_SOFT_SCRATCH(0));
> +             guc->send_regs.count = GEN11_SOFT_SCRATCH_COUNT;
> +
>       } else {
>               guc->notify_reg = GUC_SEND_INTERRUPT;
>               guc->interrupts.reset = gen9_reset_guc_interrupts;
>               guc->interrupts.enable = gen9_enable_guc_interrupts;
>               guc->interrupts.disable = gen9_disable_guc_interrupts;
> +             guc->send_regs.base = i915_mmio_reg_offset(SOFT_SCRATCH(0));
> +             guc->send_regs.count = GUC_MAX_MMIO_MSG_LEN;
> +             BUILD_BUG_ON(GUC_MAX_MMIO_MSG_LEN > SOFT_SCRATCH_COUNT);
>       }
>  }
>  
> -- 
> 2.28.0
> 
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