[Intel-gfx] [PATCH v3 47/48] drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057)

[Matt Roper]

From: José Roberto de Souza <jose.so...@intel.com>

Buffer compression is not usable in A stepping.

Cc: Matt Roper <matthew.d.ro...@intel.com>
Cc: Anusha Srivatsa <anusha.sriva...@intel.com>
Cc: Clinton A Taylor <clinton.a.tay...@intel.com>
Cc: Juha-Pekka Heikkilä <juha-pekka.heikk...@intel.com>
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
Signed-off-by: Clinton Taylor <clinton.a.tay...@intel.com>
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.sriva...@intel.com>
---
 .../drm/i915/display/skl_universal_plane.c    | 20 ++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index d51a22d4b28a..9658cde141af 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -199,6 +199,13 @@ static const u64 gen12_plane_format_modifiers_rc_ccs[] = {
        DRM_FORMAT_MOD_INVALID
 };
 
+static const u64 adlp_step_a_plane_format_modifiers[] = {
+       I915_FORMAT_MOD_Y_TILED,
+       I915_FORMAT_MOD_X_TILED,
+       DRM_FORMAT_MOD_LINEAR,
+       DRM_FORMAT_MOD_INVALID
+};
+
 int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
 {
        switch (format) {
@@ -1881,6 +1888,10 @@ static bool gen12_plane_supports_mc_ccs(struct 
drm_i915_private *dev_priv,
            IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_C0))
                return false;
 
+       /* Wa_22011186057 */
+       if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
+               return false;
+
        return plane_id < PLANE_SPRITE4;
 }
 
@@ -1898,8 +1909,12 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
        case DRM_FORMAT_MOD_LINEAR:
        case I915_FORMAT_MOD_X_TILED:
        case I915_FORMAT_MOD_Y_TILED:
+               break;
        case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
        case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
+               /* Wa_22011186057 */
+               if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
+                       return false;
                break;
        default:
                return false;
@@ -1954,7 +1969,10 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
 static const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv,
                                            enum plane_id plane_id)
 {
-       if (gen12_plane_supports_mc_ccs(dev_priv, plane_id))
+       /* Wa_22011186057 */
+       if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
+               return adlp_step_a_plane_format_modifiers;
+       else if (gen12_plane_supports_mc_ccs(dev_priv, plane_id))
                return gen12_plane_format_modifiers_mc_ccs;
        else
                return gen12_plane_format_modifiers_rc_ccs;
-- 
2.25.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx