On Thu, Apr 29, 2021 at 10:12:50AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
In order to stop conflating the validation via readback with the
workaround mask I need to expose the read mask separately so
gem_workarounds IGT can continue operating correctly.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demar...@intel.com>
Lucas De Marchi
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8dd374691102..b9c81376a413 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -757,9 +757,9 @@ static int i915_wa_registers(struct seq_file *m, void
*unused)
engine->name, count);
for (wa = wal->list; count--; wa++)
- seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
+ seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read:
0x%08X\n",
i915_mmio_reg_offset(wa->reg),
- wa->set, wa->clr);
+ wa->set, wa->clr, wa->read);
seq_printf(m, "\n");
}
--
2.30.2
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