Quoting Rodrigo Vivi (2020-12-18 15:24:12)
> sub-pipe PG is not present on DG1. Setting these bits can disable
> other power gates and cause GPU hangs on video playbacks.
Hmm, all I see is "not valid for pre-gen12".
> Fixes: 85a12d7eb8fe ("drm/i915/tgl: Fix Media power gate sequence.")
> Cc: Dale B Stimson <dale.b.stim...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
Acked-by: Chris Wilson <ch...@chris-wilson.co.uk>
-Chris
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