Reviewed-by: Swathi Dhanavanthri <swathi.dhanavant...@intel.com>
-----Original Message-----
From: Souza, Jose <jose.so...@intel.com>
Sent: Friday, August 07, 2020 10:32 AM
To: Dhanavanthri, Swathi <swathi.dhanavant...@intel.com>;
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms
The default case would do nothing.
On Thu, 2020-08-06 at 19:02 -0700, Dhanavanthri, Swathi wrote:
> It might be helpful to add a default case in the switch statement for
> unsupported cases.
>
> -----Original Message-----
> From: Intel-gfx <
> intel-gfx-boun...@lists.freedesktop.org
> > On Behalf Of José Roberto de Souza
> Sent: Monday, July 20, 2020 10:10 AM
> To:
> intel-gfx@lists.freedesktop.org
>
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Set subplatforms
>
> There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids
> are available in both SKUs.
> So here using the root device id in the PCI bus that iGPU is in to
> differentiate between U and Y.
>
> BSpec: 44455
> Signed-off-by: José Roberto de Souza < jose.so...@intel.com
> >
> ---
> drivers/gpu/drm/i915/i915_drv.h | 6 ++++++
> drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
> drivers/gpu/drm/i915/intel_device_info.c | 19 +++++++++++++++++++
> 3 files changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 56dfc6d98caa..a59f64821920
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1497,6 +1497,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_ICL_WITH_PORT_F(dev_priv) \
> IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
>
> +#define IS_TGL_U(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULT)
> +
> +#define IS_TGL_Y(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX)
> +
> #define SKL_REVID_A0 0x0
> #define SKL_REVID_B0 0x1
> #define SKL_REVID_C0 0x2
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h index a0d31f3bf634..6a0768cb01f6
> 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -12363,4 +12363,10 @@ enum skl_power_gate {
> #define DSB_ENABLE (1 << 31)
> #define DSB_STATUS (1 << 0)
>
> +#define TGL_ROOT_DEVICE_ID 0x9A00
> +#define TGL_ROOT_DEVICE_MASK 0xFF00
> +#define TGL_ROOT_DEVICE_SKU_MASK 0xF
> +#define TGL_ROOT_DEVICE_SKU_ULX 0x2
> +#define TGL_ROOT_DEVICE_SKU_ULT 0x4
> +
> #endif /* _I915_REG_H_ */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 40c590db3c76..e2aa5bc3a6e0 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -346,6 +346,25 @@ void intel_device_info_subplatform_init(struct
> drm_i915_private *i915)
> mask = BIT(INTEL_SUBPLATFORM_PORTF);
> }
>
> + if (IS_TIGERLAKE(i915)) {
> + struct pci_dev *root, *pdev = i915->drm.pdev;
> +
> + root = list_first_entry(&pdev->bus->devices, typeof(*root),
> +bus_list);
> +
> + drm_WARN_ON(&i915->drm, mask);
> + drm_WARN_ON(&i915->drm, (root->device & TGL_ROOT_DEVICE_MASK) !=
> + TGL_ROOT_DEVICE_ID);
> +
> + switch (root->device & TGL_ROOT_DEVICE_SKU_MASK) {
> + case TGL_ROOT_DEVICE_SKU_ULX:
> + mask = BIT(INTEL_SUBPLATFORM_ULX);
> + break;
> + case TGL_ROOT_DEVICE_SKU_ULT:
> + mask = BIT(INTEL_SUBPLATFORM_ULT);
> + break;
> + }
> + }
> +
> GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_BITS);
>
> RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
> --
> 2.27.0
>
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>
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