Mika Kuoppala <mika.kuopp...@linux.intel.com> writes: > HDC pipeline flush is bit on the first dword of > the PIPE_CONTROL, not the second. Make it so. > > Signed-off-by: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Fixes: 4aa0b5d457f5 ("drm/i915/tgl: Add HDC Pipeline Flush") _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx